ATMEGA32A-PU Atmel, ATMEGA32A-PU Datasheet - Page 124

MCU AVR 32K FLASH 16MHZ 40-PDIP

ATMEGA32A-PU

Manufacturer Part Number
ATMEGA32A-PU
Description
MCU AVR 32K FLASH 16MHZ 40-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Rom Size
1024 B
Height
4.83 mm
Length
52.58 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2.7 V
Width
13.97 mm
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA32A-PU
Manufacturer:
ATMEL
Quantity:
3 000
Part Number:
ATMEGA32A-PU
Manufacturer:
Atmel
Quantity:
26 792
17.7
17.7.1
17.7.2
8155C–AVR–02/11
Modes of Operation
Normal Mode
Clear Timer on Compare Match (CTC) Mode
A change of the COM21:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the
FOC2 strobe bits.
The mode of operation, that is, the behavior of the Timer/Counter and the output compare pins,
is defined by the combination of the Waveform Generation mode (WGM2[1:0]) and Compare
Output mode (COM2[1:0]) bits. The Compare Output mode bits do not affect the counting
sequence, while the Waveform Generation mode bits do. The COM2[1:0] bits control whether
the PWM output generated should be inverted or not (inverted or non-inverted PWM). For non-
PWM modes the COM2[1:0] bits control whether the output should be set, cleared, or toggled at
a compare match
For detailed timing information refer to
The simplest mode of operation is the Normal mode (WGM2[1:0] = 0). In this mode the counting
direction is always up (incrementing), and no counter clear is performed. The counter simply
overruns when it passes its maximum 8-bit value (TOP = 0xFF) and then restarts from the bot-
tom (0x00). In normal operation the Timer/Counter Overflow Flag (
timer clock cycle as the TCNT2 becomes zero. The
bit, except that it is only set, not cleared. However, combined with the timer overflow interrupt
that automatically clears the
are no special cases to consider in the normal mode, a new counter value can be written
anytime.
The Output Compare unit can be used to generate interrupts at some given time. Using the out-
put compare to generate waveforms in normal mode is not recommended, since this will occupy
too much of the CPU time.
In Clear Timer on Compare or CTC mode (WGM2[1:0] = 2), the OCR2 Register is used to
manipulate the counter resolution. In CTC mode the counter is cleared to zero when the counter
value (TCNT2) matches the OCR2. The OCR2 defines the top value for the counter, hence also
its resolution. This mode allows greater control of the compare match output frequency. It also
simplifies the operation of counting external events.
The timing diagram for the CTC mode is shown in
increases until a compare match occurs between TCNT2 and OCR2, and then counter (TCNT2)
is cleared.
(See “Compare Match Output Unit” on page
TOV2
Flag, the timer resolution can be increased by software. There
“Timer/Counter Timing Diagrams” on page
TOV2
Figure
Flag in this case behaves like a ninth
17-5. The counter value (TCNT2)
123.).
TOV2
) will be set in the same
ATmega32A
128.
124

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