ATMEGA32A-PU Atmel, ATMEGA32A-PU Datasheet - Page 282

• Manufacturer Part Number: ATMEGA32A-PU
• Description: MCU AVR 32K FLASH 16MHZ 40-PDIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32A-PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 40PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Rom Size: 1024 B
• Height: 4.83 mm
• Length: 52.58 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 13.97 mm
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.9.2
26.9.3
8155C–AVR–02/11
Data Polling Flash
Data Polling EEPROM
When a page is being programmed into the Flash, reading an address location within the page
being programmed will give the value $FF. At the time the device is ready for a new page, the
programmed value will read correctly. This is used to determine when the next page can be writ-
ten. Note that the entire page is written simultaneously and any address within the page can be
used for polling. Data polling of the Flash will not work for the value $FF, so when programming
this value, the user will have to wait for at least t
a chip erased device contains $FF in all locations, programming of addresses that are meant to
contain $FF, can be skipped. See
When a new byte has been written and is being programmed into EEPROM, reading the
address location being programmed will give the value $FF. At the time the device is ready for a
new byte, the programmed value will read correctly. This is used to determine when the next
byte can be written. This will not work for the value $FF, but the user should have the following in
mind: As a chip erased device contains $FF in all locations, programming of addresses that are
meant to contain $FF, can be skipped. This does not apply if the EEPROM is re-programmed
1. Power-up sequence:
2. Wait for at least 20ms and enable SPI Serial Programming by sending the Program-
3. The SPI Serial Programming instructions will not work if the communication is out of
4. The Flash is programmed one page at a time (page size found in
5. The EEPROM array is programmed one byte at a time by supplying the address and
6. Any memory location can be verified by using the Read instruction which returns the
7. At the end of the programming session, RESET can be set high to commence normal
8. Power-off sequence (if needed):
Apply power between V
tems, the programmer can not guarantee that SCK is held low during power-up. In this
case, RESET must be given a positive pulse of at least two CPU clock cycles duration
after SCK has been set to “0”.
ming Enable serial instruction to pin MOSI.
synchronization. When in sync. the second byte ($53), will echo back when issuing the
third byte of the Programming Enable instruction. Whether the echo is correct or not, all
four bytes of the instruction must be transmitted. If the $53 did not echo back, give
RESET a positive pulse and issue a new Programming Enable command.
269). The memory page is loaded one byte at a time by supplying the 6 LSB of the
address and data together with the Load Program Memory Page instruction. To ensure
correct loading of the page, the data low byte must be loaded before data high byte is
applied for a given address. The Program Memory Page is stored by loading the Write
Program Memory Page instruction with the 8 MSB of the address. If polling is not used,
the user must wait at least t
Accessing the SPI Serial Programming interface before the Flash write operation com-
pletes can result in incorrect programming.
data together with the appropriate Write instruction. An EEPROM memory location is
first automatically erased before new data is written. If polling is not used, the user must
wait at least t
erased device, no $FFs in the data file(s) need to be programmed.
content at the selected address at serial output MISO.
operation.
Set RESET to “1”.
Turn V
CC
power off.
WD_EEPROM
CC
before issuing the next byte. (See
and GND while RESET and SCK are set to “0”. In some sys-
WD_FLASH
Table 26-13
before issuing the next page. (See
for t
WD_FLASH
WD_FLASH
before programming the next page. As
value
Table
26-13). In a chip
“Page Size” on page
ATmega32A
Table
26-13).
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