ATMEGA32A-PU Atmel, ATMEGA32A-PU Datasheet - Page 290

• Manufacturer Part Number: ATMEGA32A-PU
• Description: MCU AVR 32K FLASH 16MHZ 40-PDIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA32A-PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Package: 40PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Rom Size: 1024 B
• Height: 4.83 mm
• Length: 52.58 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 13.97 mm
• Controller Family/series: AVR MEGA
• No. Of I/o's: 32
• Eeprom Memory Size: 1KB
• Ram Memory Size: 2KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 26-15. JTAG Programming Instruction Set (Continued)
8155C–AVR–02/11
Instruction
3b. Load Address High Byte
3c. Load Address Low Byte
3d. Read Data Low and High Byte
4a. Enter EEPROM Write
4b. Load Address High Byte
4c. Load Address Low Byte
4d. Load Data Byte
4e. Latch Data
4f. Write EEPROM Page
4g. Poll for Page Write complete
5a. Enter EEPROM Read
5b. Load Address High Byte
5c. Load Address Low Byte
5d. Read Data Byte
6a. Enter Fuse Write
6b. Load Data Low Byte
6c. Write Fuse High byte
6d. Poll for Fuse Write complete
6e. Load Data Low Byte
6f. Write Fuse Low byte
6g. Poll for Fuse Write complete
7a. Enter Lock Bit Write
7b. Load Data Byte
a = address high bits, b = address low bits, H = 0 – Low byte, 1 – High Byte, o = data out, i = data in, x = don’t care
(8)
(6)
(7)
TDI sequence
0000111_aaaaaaaa
0000011_bbbbbbbb
0110010_00000000
0110110_00000000
0110111_00000000
0100011_00010001
0000111_aaaaaaaa
0000011_bbbbbbbb
0010011_iiiiiiii
0110111_00000000
1110111_00000000
0110111_00000000
0110011_00000000
0110001_00000000
0110011_00000000
0110011_00000000
0100011_00000011
0000111_aaaaaaaa
0000011_bbbbbbbb
0110011_bbbbbbbb
0110010_00000000
0110011_00000000
0100011_01000000
0010011_iiiiiiii
0110111_00000000
0110101_00000000
0110111_00000000
0110111_00000000
0110111_00000000
0010011_iiiiiiii
0110011_00000000
0110001_00000000
0110011_00000000
0110011_00000000
0110011_00000000
0100011_00100000
0010011_11iiiiii
0110011_00000000
TDO sequence
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
ATmega32A
Notes
(9)
low byte
high byte
(9)
(1)
(1)
(2)
(9)
(3)
(1)
(2)
(3)
(1)
(2)
(4)
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