P89V51RC2FN,112 NXP Semiconductors, P89V51RC2FN,112 Datasheet - Page 32

IC 80C51 MCU FLASH 32K 40-DIP

P89V51RC2FN,112

Manufacturer Part Number
P89V51RC2FN,112
Description
IC 80C51 MCU FLASH 32K 40-DIP
Manufacturer
NXP Semiconductors
Series
89Vr
Datasheet

Specifications of P89V51RC2FN,112

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89V5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1017 - BOARD 44-ZIF PLCC SOCKET622-1001 - USB IN-CIRCUIT PROG 80C51ISP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2430-5
935278782112
P89V51RC2FN
NXP Semiconductors
P89V51RB2_RC2_RD2_5
Product data sheet
6.5.1 Capture mode
Table 21.
Table 22.
Not bit addressable; Reset value: XX00 0000B
Table 23.
In the Capture mode there are two options which are selected by bit EXEN2 in T2CON. If
EXEN2 = 0 Timer 2 is a 16-bit timer or counter (as selected by C/T2 in T2CON) which
upon overflowing sets bit TF2, the Timer 2 overflow bit.
The capture mode is illustrated in
Bit
4
3
2
1
0
Bit
7 to 2
1
0
Bit
Symbol
T2CON - Timer/counter 2 control register (address C8H) bit description
T2MOD - Timer 2 mode control register (address C9H) bit allocation
T2MOD - Timer 2 mode control register (address C9H) bit description
Symbol
TCLK
EXEN2
TR2
C/T2
CP/RL2
Symbol
-
T2OE
DCEN
7
-
Rev. 05 — 12 November 2009
6
-
Description
Transmit clock flag. When set, causes the UART to use Timer 2
overflow pulses for its transmit clock in modes 1 and 3. TCLK = 0
causes Timer 1 overflows to be used for the transmit clock.
Timer 2 external enable flag. When set, allows a capture or reload to
occur as a result of a negative transition on T2EX if Timer 2 is not
being used to clock the serial port. EXEN2 = 0 causes Timer 2 to
ignore events at T2EX.
Start/stop control for Timer 2. A logic ‘1’ enables the timer to run.
Timer or counter select. (Timer 2)
Capture/Reload flag. When set, captures will occur on negative
transitions at T2EX if EXEN2 = 1. When cleared, auto-reloads will
occur either with Timer 2 overflows or negative transitions at T2EX
when EXEN2 = 1. When either RCLK = 1 or TCLK = 1, this bit is
ignored and the timer is forced to auto-reload on Timer 2 overflow.
Description
Reserved for future use. Should be set to ‘0’ by user programs.
Timer 2 Output Enable bit. Used in programmable clock-out mode
only.
Down Count Enable bit. When set, this allows Timer 2 to be configured
as an up/down counter.
0 = internal timer (f
1 = external event counter (falling edge triggered; external clock’s
maximum rate = f
Figure
5
-
12.
osc
P89V51RB2/RC2/RD2
4
-
osc
/ 12
/ 6)
8-bit microcontrollers with 80C51 core
3
-
2
-
© NXP B.V. 2009. All rights reserved.
T2OE
1
…continued
DCEN
32 of 80
0

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