P89V51RC2FN,112 NXP Semiconductors, P89V51RC2FN,112 Datasheet - Page 58

IC 80C51 MCU FLASH 32K 40-DIP

P89V51RC2FN,112

Manufacturer Part Number
P89V51RC2FN,112
Description
IC 80C51 MCU FLASH 32K 40-DIP
Manufacturer
NXP Semiconductors
Series
89Vr
Datasheet

Specifications of P89V51RC2FN,112

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89V5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1017 - BOARD 44-ZIF PLCC SOCKET622-1001 - USB IN-CIRCUIT PROG 80C51ISP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2430-5
935278782112
P89V51RC2FN
NXP Semiconductors
P89V51RB2_RC2_RD2_5
Product data sheet
6.12.1 Idle mode
6.12 Power-saving modes
Table 51.
Table 52.
Bit addressable; Reset value: 00H
Table 53.
Table 54.
Not bit addressable; Reset value: 00H
Table 55.
The device provides two power saving modes of operation for applications where power
consumption is critical. The two modes are Idle and Power-down, see
Idle mode is entered setting the IDL bit in the PCON register. In Idle mode, the program
counter (PC) is stopped. The system clock continues to run and all interrupts and
peripherals remain active. The on-chip RAM and the special function registers hold their
data during this mode.
Bit
7
6
5
4
3
2
1
0
Bit
7 to 5
4
3 to 0
Bit
7 to 5
4
3 to 0
Bit
Symbol
Bit
Symbol
IP0H - Interrupt priority 0 high register (address B7H) bit description
IP1 - Interrupt priority 1 register (address F8H) bit allocation
IP1 - Interrupt priority 1 register (address F8H) bit description
IP1H - Interrupt priority 1 high register (address F7H) bit allocation
IP1H - Interrupt priority 1 high register (address F7H) bit description
Symbol
-
PPCH
PT2H
PSH
PT1H
PX1H
PT0H
PX0H
Symbol
-
PBO
-
Symbol
-
PBOH
-
7
7
-
-
Rev. 05 — 12 November 2009
6
6
-
-
Description
Reserved for future use. Should be set to ‘0’ by user programs.
PCA interrupt priority HIGH bit.
Timer 2 interrupt priority HIGH bit.
Serial Port interrupt priority HIGH bit.
Timer 1 interrupt priority HIGH bit.
External interrupt 1 priority HIGH bit.
Timer 0 interrupt priority HIGH bit.
External interrupt 0 priority HIGH bit.
Description
Reserved for future use. Should be set to ‘0’ by user programs.
Brownout interrupt priority bit.
Reserved for future use. Should be set to ‘0’ by user programs.
Description
Reserved for future use. Should be set to ‘0’ by user programs.
Brownout interrupt priority bit.
Reserved for future use. Should be set to ‘0’ by user programs.
5
5
-
-
PBOH
PBO
4
4
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
3
3
-
-
2
2
-
-
Table
© NXP B.V. 2009. All rights reserved.
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