P89V51RC2FN,112 NXP Semiconductors, P89V51RC2FN,112 Datasheet - Page 47

IC 80C51 MCU FLASH 32K 40-DIP

P89V51RC2FN,112

Manufacturer Part Number
P89V51RC2FN,112
Description
IC 80C51 MCU FLASH 32K 40-DIP
Manufacturer
NXP Semiconductors
Series
89Vr
Datasheet

Specifications of P89V51RC2FN,112

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89V5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1017 - BOARD 44-ZIF PLCC SOCKET622-1001 - USB IN-CIRCUIT PROG 80C51ISP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2430-5
935278782112
P89V51RC2FN
NXP Semiconductors
P89V51RB2_RC2_RD2_5
Product data sheet
In the CMOD SFR there are three additional bits associated with the PCA. They are CIDL
which allows the PCA to stop during Idle mode, WDTE which enables or disables the
Watchdog function on module 4, and ECF which when set causes an interrupt and the
PCA overflow flag CF (in the CCON SFR) to be set when the PCA timer overflows.
The watchdog timer function is implemented in module 4 of PCA.
The CCON SFR contains the run control bit for the PCA (CR) and the flags for the PCA
timer (CF) and each module (CCF4:0). To run the PCA the CR bit (CCON.6) must be set
by software. The PCA is shut off by clearing this bit. The CF bit (CCON.7) is set when the
PCA counter overflows and an interrupt will be generated if the ECF bit in the CMOD
register is set. The CF bit can only be cleared by software. Bits 0 through 4 of the CCON
register are the flags for the modules (bit 0 for module 0, bit 1 for module 1, etc.) and are
set by hardware when either a match or a capture occurs. These flags can only be cleared
by software. All the modules share one interrupt vector. The PCA interrupt system is
shown in
Each module in the PCA has a special function register associated with it. These registers
are: CCAPM0 for module 0, CCAPM1 for module 1, etc. The registers contain the bits that
control the mode that each module will operate in.
The ECCF bit (from CCAPMn.0 where n = 0, 1, 2, 3, or 4 depending on the module)
enables the CCFn flag in the CCON SFR to generate an interrupt when a match or
compare occurs in the associated module (see
PWM (CCAPMn.1) enables the pulse width modulation mode.
The TOG bit (CCAPMn.2) when set causes the CEX output associated with the module to
toggle when there is a match between the PCA counter and the module’s
capture/compare register.
The match bit MAT (CCAPMn.3) when set will cause the CCFn bit in the CCON register to
be set when there is a match between the PCA counter and the module’s
capture/compare register.
The next two bits CAPN (CCAPMn.4) and CAPP (CCAPMn.5) determine the edge that a
capture input will be active on. The CAPN bit enables the negative edge, and the CAPP bit
enables the positive edge. If both bits are set both edges will be enabled and a capture will
occur for either transition.
The last bit in the register ECOM (CCAPMn.6) when set enables the comparator function.
There are two additional registers associated with each of the PCA modules. They are
CCAPnH and CCAPnL and these are the registers that store the 16-bit count when a
capture occurs or a compare should occur. When a module is used in the PWM mode
these registers are used to control the duty cycle of the output.
Figure
22.
Rev. 05 — 12 November 2009
P89V51RB2/RC2/RD2
Figure
8-bit microcontrollers with 80C51 core
22).
© NXP B.V. 2009. All rights reserved.
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