P89V51RC2FN,112 NXP Semiconductors, P89V51RC2FN,112 Datasheet - Page 34

IC 80C51 MCU FLASH 32K 40-DIP

P89V51RC2FN,112

Manufacturer Part Number
P89V51RC2FN,112
Description
IC 80C51 MCU FLASH 32K 40-DIP
Manufacturer
NXP Semiconductors
Series
89Vr
Datasheet

Specifications of P89V51RC2FN,112

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89V5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1017 - BOARD 44-ZIF PLCC SOCKET622-1001 - USB IN-CIRCUIT PROG 80C51ISP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2430-5
935278782112
P89V51RC2FN
NXP Semiconductors
P89V51RB2_RC2_RD2_5
Product data sheet
Fig 13. Timer 2 in auto-reload mode (DCEN = 0)
OSC
T2 pin
T2EX pin
6
In this mode, there are two options selected by bit EXEN2 in T2CON register. If
EXEN2 = 0, then Timer 2 counts up to 0FFFFH and sets the TF2 (Overflow Flag) bit upon
overflow. This causes the Timer 2 registers to be reloaded with the 16-bit value in
RCAP2L and RCAP2H. The values in RCAP2L and RCAP2H are preset by software
means.
Auto reload frequency when Timer 2 is counting up can be determined from this formula:
Where SupplyFrequency is either f
(C/T2 = 1).
If EXEN2 = 1, a 16-bit reload can be triggered either by an overflow or by a 1-to-0
transition at input T2EX. This transition also sets the EXF2 bit. The Timer 2 interrupt, if
enabled, can be generated when either TF2 or EXF2 is ‘1’.
Microcontroller’s hardware will need three consecutive machine cycles in order to
recognize falling edge on T2EX and set EXF2 = 1: in the first machine cycle pin T2EX has
to be sampled as ‘1’; in the second machine cycle it has to be sampled as ‘0’, and in the
third machine cycle EXF2 will be set to ‘1’.
In
T2EX to control the direction of count. When a logic ‘1’ is applied at pin T2EX Timer 2 will
count up. Timer 2 will overflow at 0FFFFH and set the TF2 flag, which can then generate
an interrupt, if the interrupt is enabled. This timer overflow also causes the 16-bit value in
RCAP2L and RCAP2H to be reloaded into the timer registers TL2 and TH2.
------------------------------------------------------------------------------- -
65536
transition
detector
Figure
SupplyFrequency
C/T2 = 0
C/T2 = 1
14, DCEN = 1 and Timer 2 is enabled to count up or down. This mode allows pin
RCAP2H RCAP2L
EXEN2
control
Rev. 05 — 12 November 2009
TR2
control
reload
osc
RCAP2L RCAP2H
(8-bits)
TL2
(C/T2 = 0) or frequency of signal on T2 pin
(8-bits)
P89V51RB2/RC2/RD2
TH2
8-bit microcontrollers with 80C51 core
EXF2
TF2
© NXP B.V. 2009. All rights reserved.
002aaa524
interrupt
timer 2
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