P89V51RC2FN,112 NXP Semiconductors, P89V51RC2FN,112 Datasheet - Page 65

IC 80C51 MCU FLASH 32K 40-DIP

P89V51RC2FN,112

Manufacturer Part Number
P89V51RC2FN,112
Description
IC 80C51 MCU FLASH 32K 40-DIP
Manufacturer
NXP Semiconductors
Series
89Vr
Datasheet

Specifications of P89V51RC2FN,112

Program Memory Type
FLASH
Program Memory Size
32KB (32K x 8)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89V5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1017 - BOARD 44-ZIF PLCC SOCKET622-1001 - USB IN-CIRCUIT PROG 80C51ISP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-2430-5
935278782112
P89V51RC2FN
NXP Semiconductors
9. Dynamic characteristics
Table 63.
Over operating conditions: load capacitance for Port 0, ALE, and PSEN = 100 pF; load capacitance for all other
outputs = 80 pF
T
[1]
[2]
P89V51RB2_RC2_RD2_5
Product data sheet
Symbol
f
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
osc
LHLL
AVLL
LLAX
LLIV
LLPL
PLPH
PLIV
PXIX
PXIZ
PXAV
AVIV
PLAZ
RLRH
WLWH
RLDV
RHDX
RHDZ
LLDV
AVDV
LLWL
AVWL
WHQX
QVWH
RLAZ
WHLH
a
= 0 C to +70 C or 40 C to +85 C; V
T
Calculated values are for 6-clock mode only.
cy(clk)
= 1 / f
Parameter
oscillator frequency
ALE pulse width
address valid to ALE LOW time
address hold after ALE LOW time
ALE LOW to valid instruction in time
ALE LOW to PSEN LOW time
PSEN pulse width
PSEN LOW to valid instruction in time
input instruction hold after PSEN time
input instruction float after PSEN time
PSEN to address valid time
address to valid instruction in time
PSEN LOW to address float time
RD LOW pulse width
WR LOW pulse width
RD LOW to valid data in time
data hold after RD time
data float after RD time
ALE LOW to valid data in time
address to valid data in time
ALE LOW to RD or WR LOW time
address to RD or WR LOW time
data hold after WR time
data output valid to WR HIGH time
RD LOW to address float time
RD or WR HIGH to ALE HIGH time
Dynamic characteristics
osc
.
DD
= 4.5 V to 5.5 V; V
Rev. 05 — 12 November 2009
Conditions
X1 mode
X2 mode
IAP
SS
= 0 V
Min
0
0
0.25
2T
T
T
-
T
3T
-
0
-
T
-
-
6T
6T
-
0
-
-
-
3T
4T
T
7T
-
T
[1][2]
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
P89V51RB2/RC2/RD2
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
8-bit microcontrollers with 80C51 core
15
15
15
8
20
15
15
15
30
30
15
30
50
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
40
20
40
-
-
-
4T
-
-
3T
-
T
-
5T
10
-
-
5T
-
2T
8T
9T
3T
-
-
-
0
T
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
cy(clk)
© NXP B.V. 2009. All rights reserved.
+ 15
+ 15
15
45
50
60
50
12
50
75
Unit
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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