MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 154

IC MCU 16BIT 2K FLASH 112-LQFP

MC9S12HZ128VAL

Manufacturer Part Number
MC9S12HZ128VAL
Description
IC MCU 16BIT 2K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of MC9S12HZ128VAL

Core Processor
HCS12
Core Size
16-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI
Peripherals
LCD, Motor control PWM, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.35 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
112-LQFP
Processor Series
S12H
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
6 KB
Interface Type
I2C/SCI/SPI
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
85
Number Of Timers
8
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Minimum Operating Temperature
- 40 C
On-chip Adc
16-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC9S12HZ128VAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC9S12HZ128VAL
Manufacturer:
FREESCALE
Quantity:
20 000
Chapter 4 Port Integration Module (PIM9HZ256V2)
4.3.7.4
Read: Anytime. Write: Anytime.
This register enables the slew rate control and disables the digital input buffer for port pins PU[7:0].
4.3.7.5
Read: Anytime. Write: Anytime.
This register configures whether a pull-up or a pull-down device is activated on configured input pins. If
a pin is configured as output, the corresponding Pull Device Enable Register bit has no effect.
154
SRRU[7:0]
PERU[7:0]
Reset
Reset
Field
Field
7:0
7:0
W
W
R
R
SRRU7
PERU7
Slew Rate Port U
0 Disables slew rate control and enables digital input buffer.
1 Enables slew rate control and disables digital input buffer.
Pull Device Enable Port U
0 Pull-up or pull-down device is disabled.
1 Pull-up or pull-down device is enabled.
Port U Slew Rate Register (SRRU)
Port U Pull Device Enable Register (PERU)
0
0
7
7
SRRU6
PERU6
Figure 4-47. Port U Pull Device Enable Register (PERU)
0
0
6
6
Figure 4-46. Port U Slew Rate Register (SRRU)
Table 4-33. SRRU Field Descriptions
Table 4-34. PERU Field Descriptions
SRRU5
PERU5
MC9S12HZ256 Data Sheet, Rev. 2.05
0
0
5
5
SRRU4
PERU4
0
0
4
4
Description
Description
SRRU3
PERU3
0
0
3
3
SRRU2
PERU2
0
0
2
2
SRRU1
PERU1
Freescale Semiconductor
0
0
1
1
SRRU0
PERU0
0
0
0
0

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