MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 348

• Manufacturer Part Number: MC9S12HZ128VAL
• Description: IC MCU 16BIT 2K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
12.3.2.8
This register contains the interrupt enable bits for the transmit buffer empty interrupt flags.
Read: Anytime
Write: Anytime when not in initialization mode
348
TXEIE[2:0]
TXE[2:0]
Field
Field
2:0
2:0
Reset:
W
R
Transmitter Buffer Empty — This flag indicates that the associated transmit message buffer is empty, and thus
not scheduled for transmission. The CPU must clear the flag after a message is set up in the transmit buffer and
is due for transmission. The MSCAN sets the flag after the message is sent successfully. The flag is also set by
the MSCAN when the transmission request is successfully aborted due to a pending abort request (see
Section 12.3.2.9, “MSCAN Transmitter Message Abort Request Register
transmit interrupt is pending while this flag is set.
Clearing a TXEx flag also clears the corresponding ABTAKx (see
Message Abort Acknowledge Register
is cleared (see
When listen-mode is active (see
cannot be cleared and no transmission is started.
Read and write accesses to the transmit buffer will be blocked, if the corresponding TXEx bit is cleared
(TXEx = 0) and the buffer is scheduled for transmission.
0 The associated message buffer is full (loaded with a message due for transmission)
1 The associated message buffer is empty (not scheduled)
Transmitter Empty Interrupt Enable
0 No interrupt request is generated from this event.
1 A transmitter empty (transmit buffer available for transmission) event causes a transmitter empty interrupt
MSCAN Transmitter Interrupt Enable Register (CANTIER)
request.
The CANTIER register is held in the reset state when the initialization mode
is active (INITRQ = 1 and INITAK = 1). This register is writable when not
in initialization mode (INITRQ = 0 and INITAK = 0).
0
0
7
Figure 12-9. MSCAN Transmitter Interrupt Enable Register (CANTIER)
Section 12.3.2.9, “MSCAN Transmitter Message Abort Request Register
= Unimplemented
Table 12-13. CANTFLG Register Field Descriptions
Table 12-14. CANTIER Register Field Descriptions
6
0
0
MC9S12HZ256 Data Sheet, Rev. 2.05
Section 12.3.2.2, “MSCAN Control Register 1
0
0
5
(CANTAAK)”). When a TXEx flag is set, the corresponding ABTRQx bit
NOTE
4
0
0
Description
Description
0
0
3
Section 12.3.2.10, “MSCAN Transmitter
TXEIE2
(CANTARQ)”). If not masked, a
2
0
(CANCTL1)”) the TXEx flags
Freescale Semiconductor
TXEIE1
(CANTARQ)”).
0
1
TXEIE0
0
0