MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 337

• Manufacturer Part Number: MC9S12HZ128VAL
• Description: IC MCU 16BIT 2K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
1
Refer to detailed register description for write access restrictions on per bit basis.
Address
-0x002F
-0x003F
0x000A
0x000B
0x000C
0x000D
0x000E
0x001A
0x001B
0x001C
0x001D
0x001E
0x0000
0x0001
0x0002
0x0003
0x0004
0x0005
0x0006
0x0007
0x0008
0x0009
0x000F
0x0010
0x0011
0x0012
0x0013
0x0014
0x0015
0x0016
0x0017
0x0018
0x0019
0x001F
0x0020
0x0030
Offset
This section describes in detail all the registers and register bits in the
MSCAN module. Each description includes a standard register diagram
with an associated figure number. Details of register bit and field
function follow the register diagrams, in bit order. All bits of all registers
in this module are completely synchronous to internal clocks during a
register read.
MSCAN Control Register 1 (CANCTL1)
MSCAN Bus Timing Register 0 (CANBTR0)
MSCAN Bus Timing Register 1 (CANBTR1)
MSCAN Receiver Flag Register (CANRFLG)
MSCAN Receiver Interrupt Enable Register (CANRIER)
MSCAN Transmitter Flag Register (CANTFLG)
MSCAN Transmitter Interrupt Enable Register (CANTIER)
MSCAN Transmitter Message Abort Request Register (CANTARQ)
MSCAN Transmitter Message Abort Acknowledge Register (CANTAAK)
MSCAN Transmit Buffer Selection Register (CANTBSEL)
MSCAN Identifier Acceptance Control Register (CANIDAC)
RESERVED
RESERVED
MSCAN Receive Error Counter (CANRXERR)
MSCAN Transmit Error Counter (CANTXERR)
MSCAN Identifier Acceptance Register 0(CANIDAR0)
MSCAN Identifier Acceptance Register 1(CANIDAR1)
MSCAN Identifier Acceptance Register 2 (CANIDAR2)
MSCAN Identifier Acceptance Register 3 (CANIDAR3)
MSCAN Identifier Mask Register 0 (CANIDMR0)
MSCAN Identifier Mask Register 1 (CANIDMR1)
MSCAN Identifier Mask Register 2 (CANIDMR2)
MSCAN Identifier Mask Register 3 (CANIDMR3)
MSCAN Identifier Acceptance Register 4 (CANIDAR4)
MSCAN Identifier Acceptance Register 5 (CANIDAR5)
MSCAN Identifier Acceptance Register 6 (CANIDAR6)
MSCAN Identifier Acceptance Register 7 (CANIDAR7)
MSCAN Identifier Mask Register 4 (CANIDMR4)
MSCAN Identifier Mask Register 5 (CANIDMR5)
MSCAN Identifier Mask Register 6 (CANIDMR6)
MSCAN Identifier Mask Register 7 (CANIDMR7)
Foreground Receive Buffer (CANRXFG)
Foreground Transmit Buffer (CANTXFG)
Table 12-2. MSCAN Memory Map
MC9S12HZ256 Data Sheet, Rev. 2.05
Register
Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
2
R
R
R
/W
2
1
1
1
1
1
1
1
1
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