MC9S12HZ128VAL Freescale Semiconductor, MC9S12HZ128VAL Datasheet - Page 342

• Manufacturer Part Number: MC9S12HZ128VAL
• Description: IC MCU 16BIT 2K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12HZ128VAL

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: CAN, EBI/EMI, I²C, SCI, SPI
• Peripherals: LCD, Motor control PWM, POR, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 112-LQFP
• Processor Series: S12H
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 6 KB
• Interface Type: I2C/SCI/SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 85
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 12 Freescale’s Scalable Controller Area Network (MSCANV2)
12.3.2.3
The CANBTR0 register configures various CAN bus timing parameters of the MSCAN module.
Read: Anytime
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1)
342
SJW[1:0]
BRP[5:0]
Field
7:6
5:0
Reset:
W
R
BRP5
Synchronization Jump Width — The synchronization jump width defines the maximum number of time quanta
(Tq) clock cycles a bit can be shortened or lengthened to achieve resynchronization to data transitions on the
CAN bus (see
Baud Rate Prescaler — These bits determine the time quanta (Tq) clock which is used to build up the bit timing
(see
MSCAN Bus Timing Register 0 (CANBTR0)
0
0
0
0
1
:
SJW1
Table
0
7
SJW1
BRP4
12-7).
0
0
1
1
0
0
0
0
1
:
Table
Figure 12-4. MSCAN Bus Timing Register 0 (CANBTR0)
Table 12-6. Synchronization Jump Width
SJW0
Table 12-5. CANBTR0 Register Field Descriptions
BRP3
6
0
12-6).
0
0
0
0
1
:
Table 12-7. Baud Rate Prescaler
BRP2
MC9S12HZ256 Data Sheet, Rev. 2.05
BRP5
0
0
0
0
1
:
0
5
SJW0
BRP1
0
1
0
1
0
0
1
1
1
:
BRP4
4
0
BRP0
Description
0
1
0
1
1
:
BRP3
Synchronization Jump Width
0
3
Prescaler value (P)
2 Tq clock cycles
3 Tq clock cycles
4 Tq clock cycles
1 Tq clock cycle
BRP2
64
2
0
1
2
3
4
:
Freescale Semiconductor
BRP1
0
1
BRP0
0
0