STM8S103F3P6

Manufacturer Part NumberSTM8S103F3P6
DescriptionMCU 8BIT 8KB FLASH 20-TSSOP
ManufacturerSTMicroelectronics
SeriesSTM8S
STM8S103F3P6 datasheet
 


Specifications of STM8S103F3P6

Core ProcessorSTM8Core Size8-Bit
Speed16MHzConnectivityI²C, IrDA, LIN, SPI, UART/USART
PeripheralsBrown-out Detect/Reset, POR, PWM, WDTNumber Of I /o16
Program Memory Size8KB (8K x 8)Program Memory TypeFLASH
Eeprom Size640 x 8Ram Size1K x 8
Voltage - Supply (vcc/vdd)2.95 V ~ 5.5 VData ConvertersA/D 5x10b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case20-TSSOPProcessor SeriesSTM8S10x
CoreSTM8Data Bus Width8 bit
Data Ram Size1 KBInterface TypeI2C, SPI, UART
Maximum Clock Frequency16 MHzNumber Of Programmable I/os16
Number Of Timers7Maximum Operating Temperature+ 85 C
Mounting StyleSMD/SMT3rd Party Development ToolsEWSTM8
Development Tools By SupplierSTM8/128-MCKIT, STM8S-DISCOVERY, ST-LINK, STICE-SYS001, STX-RLINKMinimum Operating Temperature- 40 C
On-chip Adc10 bit, 5 ChannelFeatured ProductSTM32 Cortex-M3 Companion Products
For Use With497-10593 - KIT STARTER FOR STM8S207/8 SERLead Free Status / RoHS StatusLead free / RoHS Compliant
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STM8S103K3 STM8S103F3 STM8S103F2
6.2
Register map
6.2.1
I/O port hardware register map
Address
Block
0x00 5000
0x00 5001
0x00 5002
Port A
0x00 5003
0x00 5004
0x00 5005
0x00 5006
0x00 5007
Port B
0x00 5008
0x00 5009
0x00 500A
0x00 500B
0x00 500C
Port C
0x00 500D
0x00 500E
0x00 500F
0x00 5010
0x00 5011
Port D
0x00 5012
0x00 5013
0x00 5014
0x00 5015
Port E
0x00 5016
0x00 5017
Table 7: I/O port hardware register map
Register label
Register name
PA_ODR
Port A data output latch register
PA_IDR
Port A input pin value register
PA_DDR
Port A data direction register
PA_CR1
Port A control register 1
PA_CR2
Port A control register 2
PB_ODR
Port B data output latch register
PB_IDR
Port B input pin value register
PB_DDR
Port B data direction register
PB_CR1
Port B control register 1
PB_CR2
Port B control register 2
PC_ODR
Port C data output latch register
PB_IDR
Port C input pin value register
PC_DDR
Port C data direction register
PC_CR1
Port C control register 1
PC_CR2
Port C control register 2
PD_ODR
Port D data output latch register
PD_IDR
Port D input pin value register
PD_DDR
Port D data direction register
PD_CR1
Port D control register 1
PD_CR2
Port D control register 2
PE_ODR
Port E data output latch register
PE_IDR
Port E input pin value register
PE_DDR
Port E data direction register
PE_CR1
Port E control register 1
DocID15441 Rev 6
Memory and register map
Reset
status
0x00
0xXX
0x00
0x00
0x00
0x00
0xXX
0x00
0x00
0x00
0x00
0xXX
0x00
0x00
0x00
0x00
0xXX
0x00
0x02
0x00
0x00
0xXX
0x00
0x00
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