MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 103

• Manufacturer Part Number: MC908GR16VFAE
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR16VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

8.6 IRQ Status and Control Register
The IRQ status and control register (INTSCR) controls and monitors operation of the IRQ module. The
INTSCR:
IRQF — IRQ Flag Bit
ACK — IRQ Interrupt Request Acknowledge Bit
IMASK — IRQ Interrupt Mask Bit
MODE — IRQ Edge/Level Select Bit
Freescale Semiconductor
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This read-only status bit is high when the IRQ interrupt is pending.
Writing a 1 to this write-only bit clears the IRQ latch. ACK always reads as 0. Reset clears ACK.
Writing a 1 to this read/write bit disables IRQ interrupt requests. Reset clears IMASK.
This read/write bit controls the triggering sensitivity of the IRQ pin. Reset clears MODE.
1 = IRQ interrupt pending
0 = IRQ interrupt not pending
1 = IRQ interrupt requests disabled
0 = IRQ interrupt requests enabled
1 = IRQ interrupt requests on falling edges and low levels
0 = IRQ interrupt requests on falling edges only
Shows the state of the IRQ flag
Clears the IRQ latch
Masks IRQ interrupt request
Controls triggering sensitivity of the IRQ interrupt pin.
Address:
Reset:
Read:
Write:
$001D
Figure 8-4. IRQ Status and Control Register (INTSCR)
Bit 7
0
= Unimplemented
6
0
MC68HC908GR16 Data Sheet, Rev. 5.0
5
0
4
0
IRQF
3
0
ACK
2
0
0
IRQ Status and Control Register
IMASK
1
0
MODE
Bit 0
0
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