MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 151

• Manufacturer Part Number: MC908GR16VFAE
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR16VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

14.4.2 Transmitter
Figure 14-5
The baud rate clock source for the ESCI can be selected via the configuration bit, ESCIBDSRC.
Freescale Semiconductor
PSSB4
PSSB3
PSSB2
PSSB1
PSSB0
PDS2
PDS1
PDS0
shows the structure of the SCI transmitter and the registers are summarized in
SCP1
SCP0
SCR1
SCR2
SCR0
÷
4
START
START
BIT
BIT
SCALER
PRE-
BIT 0
BIT 0
BIT 1
BIT 1
DIVIDER
BAUD
PEN
PTY
TXINV
BIT 2
BIT 2
MC68HC908GR16 Data Sheet, Rev. 5.0
Figure 14-4. SCI Data Formats
Figure 14-5. ESCI Transmitter
÷
GENERATION
BIT 3
BIT 3
16
PARITY
(BIT M IN SCC1 CLEAR)
SCTE
SCTIE
TC
TCIE
9-BIT DATA FORMAT
(BIT M IN SCC1 SET)
8-BIT DATA FORMAT
T8
M
BIT 4
BIT 4
H
BIT 5
BIT 5
8
SCTIE
7
SCTE
TCIE
TC
BIT 6
BIT 6
ESCI DATA REGISTER
6
SHIFT REGISTER
INTERNAL BUS
TRANSMIT
5
OR DATA
PARITY
11-BIT
BIT 7
BIT 7
BIT
4
CONTROL LOGIC
TRANSMITTER
3
OR DATA
PARITY
STOP
BIT 8
BIT
BIT
2
1
START
LOOPS
NEXT
STOP
ENSCI
LINT
BIT
BIT
SBK
TE
0
L
START
NEXT
BIT
Functional Description
Figure
SCI_TxD
14-3.
151