MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 116

• Manufacturer Part Number: MC908GR16VFAE
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR16VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Low-Power Modes
10.15 Exiting Stop Mode
These events restart the system clocks and load the program counter with the reset vector or with an
interrupt vector:
Upon exit from stop mode, the system clocks begin running after an oscillator stabilization delay. A 12-bit
stop recovery counter inhibits the system clocks for 4096 CGMXCLK cycles after the reset or external
interrupt.
The short stop recovery bit, SSREC, in the CONFIG1 register controls the oscillator stabilization delay
during stop recovery. Setting SSREC reduces stop recovery time from 4096 CGMXCLK cycles to 32
CGMXCLK cycles.
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Timer 2 interface (TIM2) module interrupt — A CPU interrupt request from the TIM2 loads the
program counter with the contents of:
–
–
Serial peripheral interface (SPI) module interrupt — A CPU interrupt request from the SPI loads
the program counter with the contents of:
–
–
Serial communications interface (SCI) module interrupt — A CPU interrupt request from the SCI
loads the program counter with the contents of:
–
–
–
Analog-to-digital converter (ADC) module interrupt — A CPU interrupt request from the ADC loads
the program counter with the contents of: $FFDE and $FFDF; ADC conversion complete.
Timebase module (TBM) interrupt — A CPU interrupt request from the TBM loads the program
counter with the contents of: $FFDC and $FFDD; TBM interrupt.
External reset — A 0 on the RST pin resets the MCU and loads the program counter with the
contents of locations $FFFE and $FFFF.
External interrupt — A high-to-low transition on an external interrupt pin loads the program counter
with the contents of locations:
–
–
Low-voltage inhibit (LVI) reset — A power supply voltage below the LVI
MCU and loads the program counter with the contents of locations $FFFE and $FFFF.
Break interrupt — In emulation mode, a break interrupt loads the program counter with the contents
of locations $FFFC and $FFFD.
Timebase module (TBM) interrupt — A TBM interrupt loads the program counter with the contents
of locations $FFDC and $FFDD when the timebase counter has rolled over. This allows the TBM
to generate a periodic wakeup from stop mode.
$FFEC and $FFED; TIM2 overflow
$FFF0 and $FFF1; TIM2 channel 0
$FFE8 and $FFE9; SPI transmitter
$FFEA and $FFEB; SPI receiver
$FFE2 and $FFE3; SCI transmitter
$FFE4 and $FFE5; SCI receiver
$FFE6 and $FFE7; SCI receiver error
$FFFA and $FFFB; IRQ pin
$FFE0 and $FFE1; keyboard interrupt pins
Use the full stop recovery time (SSREC = 0) in applications that use an
external crystal.
MC68HC908GR16 Data Sheet, Rev. 5.0
NOTE
TRIPF
Freescale Semiconductor
voltage resets the