MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 192

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MC908GR16VFAE

Manufacturer Part Number
MC908GR16VFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908GR16VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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System Integration Module (SIM)
15.7 SIM Registers
The SIM has three memory-mapped registers.
15.7.1 Break Status Register
The break status register (BSR) contains a flag to indicate that a break caused an exit from wait mode.
This register is only used in emulation mode.
SBSW — SIM Break Stop/Wait
192
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
1 = Wait mode was exited by break interrupt.
0 = Wait mode was not exited by break interrupt.
CGMXCLK
INT/BREAK
IAB
Address:
Reset:
Read:
Write:
1. Writing a 0 clears SBSW.
$FE00
Bit 7
R
R
0
Figure 15-20. Stop Mode Recovery from Interrupt
Address
$FE00
$FE01
$FE03
Figure 15-21. Break Status Register (BSR)
STOP +1
= Reserved
R
6
0
MC68HC908GR16 Data Sheet, Rev. 5.0
Table 15-4. SIM Registers
R
5
0
Register
SRSR
BFCR
BSR
STOP + 2
Table 15-4
STOP RECOVERY PERIOD
R
4
0
STOP + 2
shows the mapping of these registers.
R
3
0
Access Mode
SP
User
User
User
R
2
0
SP – 1
Note
SBSW
1
0
(1)
Freescale Semiconductor
SP – 2
Bit 0
R
0
SP – 3

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