MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 53

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MC908GR16VFAE

Manufacturer Part Number
MC908GR16VFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908GR16VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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3.7.4 ADC Voltage Reference Low Pin (V
The ADC analog portion uses V
to the same voltage potential as V
results. Any noise present on this pin will be reflected and possibly magnified in A/D conversion values.
V
3.7.5 ADC Voltage In (V
V
3.8 I/O Registers
These I/O registers control and monitor ADC operation:
3.8.1 ADC Status and Control Register
Function of the ADC status and control register (ADSCR) is described here.
COCO — Conversions Complete Bit
Freescale Semiconductor
SSAD
ADIN
In non-interrupt mode (AIEN = 0), COCO is a read-only bit that is set at the end of each conversion.
COCO will stay set until cleared by a read of the ADC data register. Reset clears this bit.
In interrupt mode (AIEN = 1), COCO is a read-only bit that is not set at the end of a conversion. It
always reads as a 0.
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0) or CPU interrupt enabled (AIEN = 1)
is the input voltage signal from one of the eight ADC channels to the ADC module.
ADC status and control register (ADSCR)
ADC data register (ADRH and ADRL)
ADC clock register (ADCLK)
and V
REFL
Address:
For maximum noise immunity, route V
to V
Routing V
noise rejection.
The write function of the COCO bit is reserved. When writing to the ADSCR
register, always have a 0 in the COCO bit position.
Reset:
Read:
Write:
are double-bonded on the MC68HC908GR16.
SS
, place bypass capacitors as close as possible to the package.
$003C
COCO
Figure 3-4. ADC Status and Control Register (ADSCR)
Bit 7
REFH
R
R
0
ADIN
close and parallel to V
= Reserved
REFL
AIEN
)
SS
6
0
MC68HC908GR16 Data Sheet, Rev. 5.0
. External filtering is often necessary to ensure a clean V
as its lower voltage reference pin. By default, connect the V
ADCO
5
0
REFL
NOTE
NOTE
ADCH4
4
1
REFL
)
REFL
may improve common mode
carefully and, if not connected
ADCH3
3
1
ADCH2
2
1
ADCH1
1
1
ADCH0
Bit 0
1
REFL
I/O Registers
REFL
for good
pin
53

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