MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 233

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MC908GR16VFAE

Manufacturer Part Number
MC908GR16VFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908GR16VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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18.9.3 TIM Counter Modulo Registers
The read/write TIM modulo registers contain the modulo value for the TIM counter. When the TIM counter
reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM counter resumes counting
from $0000 at the next timer clock. Writing to the high byte (TMODH) inhibits the TOF bit and overflow
interrupts until the low byte (TMODL) is written. Reset sets the TIM counter modulo registers.
18.9.4 TIM Channel Status and Control Registers
Each of the TIM channel status and control registers:
Freescale Semiconductor
Flags input captures and output compares
Enables input capture and output compare interrupts
Selects input capture, output compare, or PWM operation
Selects high, low, or toggling output on output compare
Selects rising edge, falling edge, or any edge as the active input capture trigger
Selects output toggling on TIM overflow
Selects 0% and 100% PWM duty cycle
Selects buffered or unbuffered output compare/PWM operation
Address: T1MODH, $0023 and T2MODH, $002E
Address: T1MODL, $0024 and T2MODL, $002F
Address: T1SC0, $0025 and T2SC0, $0030
Reset the TIM counter before writing to the TIM counter modulo registers.
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Figure 18-10. TIM Channel 0 Status and Control Register (TSC0)
Figure 18-8. TIM Counter Modulo Register High (TMODH)
Figure 18-9. TIM Counter Modulo Register Low (TMODL)
Bit 15
CH0F
Bit 7
Bit 7
Bit 7
Bit 7
1
1
0
0
CH0IE
14
6
1
6
6
1
6
0
MC68HC908GR16 Data Sheet, Rev. 5.0
MS0B
13
5
1
5
5
1
5
0
NOTE
MS0A
12
4
1
4
4
1
4
0
ELS0B
11
3
1
3
3
1
3
0
ELS0A
10
2
1
2
2
1
2
0
TOV0
1
9
1
1
1
1
1
0
CH0MAX
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
1
1
0
I/O Registers
233

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