MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 4

• Manufacturer Part Number: MC908GR16VFAE
• Description: IC MCU 16K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR16VFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: LIN, SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 33
• Number Of Timers: 4
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Revision History
Revision History (Continued)
4
September,
January,
March,
April,
Date
2004
2005
2007
2007
Revision
Level
2.0
3.0
4.0
5.o
Figure 1-1. MCU Block Diagram — Removed data bus switch module
Figure 2-2. Control, Status, and Data Registers and Figure 5-1. Configuration
Register 2 (CONFIG2) — Changed name of bit 0 from SCIBDSRC to
ESCIBDSRC
14.8.8 ESCI Prescaler Register — Updated description in this subsection
14.9.1 ESCI Arbiter Control Register — Updated description of ACLK bit
14.9.3 Bit Time Measurement — Updated bit time measurement mode for
ACLK = 0
Added dc injection current values to:
20.9.1 CGM Component Specifications — Corrected series resistor values
20.15 Memory Characteristics — Table updated to reflect new values
10.5 Clock Generator Module (CGM) — Updated description to remove
erroneous information.
20.9 Clock Generation Module Characteristics — Updated to reflect correct
values.
Table 13-2. Interrupt Source Flags — Changed IF7 to TIM2 channel instead
of Reserved.
Table 2-1. Vector Addresses — Changed address $FFEE to TIM2 Channel 1
Vector (High) and $FFEF to TIM2 Channel 1 Vector (Low) from Reserved
Figure 2-2. Control, Status, and Data Registers — Changed addresses
$0033 to $0035 to show TIM2 Channel 1 registers.
Figure 2-2. Control, Status, and Data Registers
TMBCLKSEL to be compatile with development tool nomenclature
Chapter 5 Configuration Register (CONFIG)
CGMXCLK, replaced TMCLKSEL with TMBCLKSEL to be compatible with
development tool nomenclature, and replaced exponents for COP timeout
period
6.2 Functional Description
10.6.2 Stop Mode
Figure 14-2. ESCI Module Block Diagram
CLOCK and removed reference to rx BUSCLK
Figure 14-5. ESCI Transmitter
Diagram
14.8.7 ESCI Baud Rate Register
LINR bits
Figure 17-1 . Timebase Block Diagram
Replaced TBMCLKSEL with TMBCLKSEL to be compatible with
development tool nomenclature
20.5 5.0-Vdc Electrical Characteristics
20.6 3.3-Vdc Electrical Characteristics
— Added CGMXCLK OR to BUS CLOCK designator
MC68HC908GR16 Data Sheet, Rev. 5.0
— Changed COPCLK to CGMXCLK
— Replaced exponents for COP timeout period
and
Description
— Replaced description of the LINT and
Figure 14-6. ESCI Receiver Block
and
— Replaced BUS_CLK with BUS
17.5 TBM Interrupt
— Changed COPCLK to
— Replaced TMCLKSEL with
Rate—
Freescale Semiconductor
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