MC908GR16VFAE Freescale Semiconductor, MC908GR16VFAE Datasheet - Page 185

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MC908GR16VFAE

Manufacturer Part Number
MC908GR16VFAE
Description
IC MCU 16K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheets

Specifications of MC908GR16VFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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15.5.1 Interrupts
At the beginning of an interrupt, the CPU saves the CPU register contents on the stack and sets the
interrupt mask (I bit) to prevent additional interrupts. At the end of an interrupt, the RTI instruction recovers
the CPU register contents from the stack so that normal processing can resume.
interrupt entry timing.
Interrupts are latched, and arbitration is performed in the SIM at the start of interrupt processing. The
arbitration result is a constant that the CPU uses to determine which vector to fetch. Once an interrupt is
latched by the SIM, no other interrupt can take precedence, regardless of priority, until the latched
interrupt is serviced (or the I bit is cleared). See
Freescale Semiconductor
MODULE INTERRUPT
I BIT
INTERRUPT
R/W
I BIT
IDB
R/W
IAB
IDB
IAB
MODULE
DUMMY
DUMMY
Figure 15-10
SP – 4
SP
PC – 1[7:0] PC – 1[15:8]
CCR
Figure 15-10. Interrupt Recovery Timing
Figure 15-9
SP – 3
SP – 1
MC68HC908GR16 Data Sheet, Rev. 5.0
shows interrupt recovery timing.
A
SP – 2
SP – 2
.
Interrupt Entry Timing
X
X
Figure
SP – 1
SP – 3
PC – 1 [7:0] PC – 1 [15:8] OPCODE
15-11.
A
SP – 4
SP
CCR
VECT H
PC
V DATA H
PC + 1
VECT L
OPERAND
V DATA L
Figure 15-9
START ADDR
OPCODE
Exception Control
shows
185

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