MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 314

• Manufacturer Part Number: MCF5307AI90B
• Description: IC MPU 32BIT COLDF 90MHZ 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307AI90B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 90MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 90 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 90MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: FQFP
• Program Memory Size: 8KB
• Cpu Speed: 90MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
2
3
Register Descriptions
14.3.1 UART Mode Registers 1 (UMR1n)
The UART mode registers 1 (UMR1n) control configuration. UMR1n can be read or
written when the mode register pointer points to it, at RESET or after a
REGISTER POINTER
pointer points to UMR2n.
14-4
0x1E0–
UART0
0x1EC
0x1FC
0x1F0
0x1F4
0x1F8
UMR1n, UMR2n, and UCSRn should be changed only after the receiver/transmitter is issued a software reset
command. That is, if channel operation is not disabled, undesirable results may occur.
This address is for factory testing. Reading this location results in undesired effects and possible incorrect
transmission or reception of characters. Register contents may also be changed.
Address-triggered commands
MBAR Offset
UART1
0x220–
0x22C
0x23C
0x230
0x234
0x238
Table 14-1. UART Module Programming Model (Continued)
UART registers are accessible only as bytes. Although external
masters cannot access on-chip memories or MBAR, they can
access any UART registers.
Do not access
UART interrupt vector
register—(UIVRn) [p.
14-15]
(Read) UART input
port registers—(UIPn)
[p. 14-15]
(Write) Do not access
(Read) Do not access
(Write) UART output
port bit set command
registers—(UOP1n
[p. 14-15]
(Read) Do not access
(Write) UART output
port bit reset
command
registers—(UOP0n
[p. 14-15]
command using UCRn[MISC]. After UMR1n is read or written, the
[31:24]
Freescale Semiconductor, Inc.
For More Information On This Product,
2
3
3
)
)
2
2
2
Go to: www.freescale.com
MCF5307 User’s Manual
—
—
—
—
—
—
—
—
[23:16]
NOTE:
[15:8]
RESET MODE
[7:0]