MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 402

• Manufacturer Part Number: MCF5307AI90B
• Description: IC MPU 32BIT COLDF 90MHZ 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307AI90B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 90MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 90 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 90MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: FQFP
• Program Memory Size: 8KB
• Cpu Speed: 90MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Data Transfer Operation
18.4.7.3 Line Write Bus Cycles
Figure 18-16 shows a line access write with zero wait states. It begins like a basic write bus
cycle with data driven one clock after TS. The next pipelined burst data is driven a cycle
after the write data is registered (on the rising edge of S6). Each subsequent burst takes a
single cycle. Note that as with the line read example in Figure 18-12, AS and CSx remain
asserted throughout the burst transfer. This example shows the behavior of the address lines
for both internal and external termination. Note that with external termination, address
lines, like SIZ, TT, and TM, hold the same value for the entire transfer.
BE/BWEx, OE
External Termination
18-14
Internal Termination
TM[1:0], TT[1:0]
AS, CSx
SIZ[1:0]
BCLKO
TM[2:0]
D[31:0]
A[31:0]
TT[1:0]
OE, BE/BWE
Figure 18-16. Line Write Burst (2-1-1-1), Internal/External Termination
R/W
TIP
Figure 18-15. Line Read Burst-Inhibited, Fast, External Termination
TS
TA
R/W, TIP
AS, CSx
SIZ[1:0]
BCLKO
A[31:0]
A[31:0]
D[31:0]
TS
TA
S0
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S1
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A[3:2] = 00
S2 S3 S4 S5 S0 S1 S4 S5 S0 S1 S4 S5 S0 S1 S4 S5
Basic
S0
Line
Read
S1
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MCF5307 User’s Manual
S2
S3
A[3:2] = 01
Write
Fast
Read
S4
S5
S6
A[3:2] = 10
Longword
Write
Fast
Read
S7
S8
Write
S9
A[3:2] = 11
Fast
Read
S10
Write
S11
S6
S7