MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 401

IC MPU 32BIT COLDF 90MHZ 208FQFP

MCF5307AI90B

Manufacturer Part Number
MCF5307AI90B
Description
IC MPU 32BIT COLDF 90MHZ 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets

Specifications of MCF5307AI90B

Core Processor
Coldfire V3
Core Size
32-Bit
Speed
90MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-FQFP
Maximum Clock Frequency
90 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
90MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
FQFP
Program Memory Size
8KB
Cpu Speed
90MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5307AI90B
Manufacturer:
FREESCAL
Quantity:
153
Part Number:
MCF5307AI90B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MCF5307AI90B
Manufacturer:
FREESCALE
Quantity:
20 000
Figure 18-14 shows a line access read with one wait state programmed in CSCRx to give
the peripheral or memory more time to return read data. This figure follows the same
execution as a zero-wait state read burst with the exception of an added wait state.
Figure 18-15 shows a burst-inhibited line read access with fast termination. The external
device executes a basic read cycle while determining that a line is being transferred. The
external device uses fast termination for subsequent transfers.
TM[2:0], SIZ[1:0]
TM[2:0], SIZ[1:0]
A[31:0], TT[1:0]
.
BE/BWEx, OE
BE/BWEx, OE
AS, CSx
AS, CSx
BCLKO
D[31:0]
BCLKO
D[31:0]
A[31:0]
TT[1:0]
R/W
R/W
TIP
TS
TIP
TA
TS
TA
Figure 18-14. Line Read Burst (3-2-2-2), External Termination
Figure 18-13. Line Read Burst (2-1-1-1), Internal Termination
S0 S1 S2 S3
Freescale Semiconductor, Inc.
S0
For More Information On This Product,
S1
Chapter 18. Bus Operation
Go to: www.freescale.com
WS
S2
Read
S3
Read
S4 S5
S4
WS
Read
S5
Read
S6
S6
S7
Read
S7
WS
S8
Read
S8
S9
Read
S9
Data Transfer Operation
S10
WS
Read
S11 S12
S10
S11 S12 S13
18-13

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