MC68332ACFC25 Freescale Semiconductor, MC68332ACFC25 Datasheet - Page 13

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MC68332ACFC25

Manufacturer Part Number
MC68332ACFC25
Description
IC MCU 32BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68332ACFC25

Core Processor
CPU32
Core Size
32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68332ACFC25
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MC68332ACFC25
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Figure
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4-1
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MC68332
USER’S MANUAL
MCU Block Diagram ....................................................................................... 3-3
Pin Assignments for 132-Pin Package ........................................................... 3-4
Pin Assignments for 144-Pin Package ........................................................... 3-5
Internal Register Memory Map ..................................................................... 3-10
Overall Memory Map .................................................................................... 3-11
Separate Supervisor and User Space Map .................................................. 3-12
Supervisor Space (Separate Program/Data Space) Map ............................ 3-13
User Space (Separate Program/Data Space) Map ...................................... 3-14
System Integration Module Block Diagram .................................................... 4-2
System Configuration and Protection ............................................................. 4-3
Periodic Interrupt Timer and Software Watchdog Timer ................................ 4-7
System Clock Block Diagram ......................................................................... 4-9
System Clock Oscillator Circuit .................................................................... 4-10
System Clock Filter Networks ...................................................................... 4-11
MCU Basic System ...................................................................................... 4-17
Operand Byte Order ..................................................................................... 4-21
Word Read Cycle Flowchart ......................................................................... 4-25
Write Cycle Flowchart .................................................................................. 4-26
CPU Space Address Encoding .................................................................... 4-27
Breakpoint Operation Flowchart ................................................................... 4-30
LPSTOP Interrupt Mask Level ...................................................................... 4-31
Bus Arbitration Flowchart for Single Request ............................................... 4-36
Data Bus Mode Select Conditioning ............................................................. 4-40
Power-On Reset ........................................................................................... 4-45
Basic MCU System ...................................................................................... 4-50
Chip-Select Circuit Block Diagram ............................................................... 4-51
CPU Space Encoding for Interrupt Acknowledge ......................................... 4-56
CPU32 Block Diagram ................................................................................... 5-2
User Programming Model .............................................................................. 5-3
Supervisor Programming Model Supplement ................................................. 5-3
Data Organization in Data Registers .............................................................. 5-4
Address Organization in Address Registers ................................................... 5-5
Memory Operand Addressing ........................................................................ 5-7
Common in-Circuit Emulator Diagram .......................................................... 5-16
Bus State Analyzer Configuration ................................................................ 5-17
Debug Serial I/O Block Diagram .................................................................. 5-21
BDM Serial Data Word ................................................................................. 5-22
BDM Connector Pinout ................................................................................. 5-22
Loop Mode Instruction Sequence ................................................................. 5-23
QSM Block Diagram ....................................................................................... 6-1
QSPI Block Diagram ..................................................................................... 6-6
Freescale Semiconductor, Inc.
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