MC68332ACFC25 Freescale Semiconductor, MC68332ACFC25 Datasheet - Page 98

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MC68332ACFC25

Manufacturer Part Number
MC68332ACFC25
Description
IC MCU 32BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68332ACFC25

Core Processor
CPU32
Core Size
32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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MC68332ACFC25
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Freescale Semiconductor
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MC68332ACFC25
Manufacturer:
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4.9 Parallel Input/Output Ports
4.9.1 Pin Assignment Registers
4.9.2 Data Direction Registers
4.9.3 Data Registers
4.10 Factory Test
4-58
Fifteen SIM pins can be configured for general-purpose discrete input and output. Al-
though these pins are organized into two ports, port E and port F, function assignment
is by individual pin. Pin assignment registers, data direction registers, and data regis-
ters are used to implement discrete I/O.
Bits in the port E and port F pin assignment registers (PEPAR and PFPAR) control the
functions of the pins in each port. Any bit set to one defines the corresponding pin as
a bus control signal. Any bit cleared to zero defines the corresponding pin as an I/O
pin.
Bits in the port E and port F data direction registers (DDRE and DDRF) control the di-
rection of the pin drivers when the pins are configured as I/O. Any bit in a register set
to one configures the corresponding pin as an output. Any bit in a register cleared to
zero configures the corresponding pin as an input. These registers can be read or writ-
ten at any time. Writes have no effect.
A write to the port E and port F data registers (PORTE and PORTF) is stored in an
internal data latch, and if any pin in the corresponding port is configured as an output,
the value stored for that bit is driven out on the pin. A read of a data register returns
the value at the pin only if the pin is configured as a discrete input. Otherwise, the value
read is the value stored in the register. Both data registers can be accessed in two lo-
cations. Registers can be read or written at any time.
The test submodule supports scan-based testing of the various MCU modules. It is in-
tegrated into the SIM to support production test. Test submodule registers are intend-
ed for Freescale use only. Register names and addresses are provided in APPENDIX
D REGISTER SUMMARY to show the user that these addresses are occupied. The
QUOT pin is also used for factory test.
Table 4-24 CSBOOT Base and Option Register Reset Values
Freescale Semiconductor, Inc.
Async/Sync Mode
Upper/Lower Byte
Address Space
For More Information On This Product,
Base Address
Read/Write
Block Size
Autovector
DSACK
Fields
AS/DS
SYSTEM INTEGRATION MODULE
IPL
Go to: www.freescale.com
Interrupt Vector Externally
Supervisor/User Space
Asynchronous Mode
13 Wait States
Reset Values
Read/Write
Both Bytes
Any Level
$000000
1 Mbyte
AS
USER’S MANUAL
MC68332

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