MC68332ACFC25 Freescale Semiconductor, MC68332ACFC25 Datasheet - Page 227

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MC68332ACFC25

Manufacturer Part Number
MC68332ACFC25
Description
IC MCU 32BIT 25MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68332ACFC25

Core Processor
CPU32
Core Size
32-Bit
Speed
25MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
15
Program Memory Type
ROMless
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-

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D.2.24 CSPAR1 — Chip Select Pin Assignment Register 1
D.2.25 CSBARBT — Chip Select Base Address Register Boot ROM
D.2.26 CSBAR[0:10] — Chip Select Base Address Registers
ADDR[23:11] — Base Address
MC68332
USER’S MANUAL
ADDR
ADDR
15
15
23
15
23
0
0
0
0
Contains five 2-bit fields (CSPA1[4:0]) that determine the functions of corresponding
chip-select pins. CSPAR1[15:10] are not used. These bits always read zero; write has
no effect. The CSPAR1 pin assignments table shows alternate functions that can be
enabled by data bus mode selection during reset.
Each chip-select pin has an associated base address register. A base address is the
lowest address in the block of addresses enabled by a chip select. CSBARBT contains
the base address for selection of a bootstrap peripheral memory device. Bit and field
definition for CSBARBT and CSBAR[0:10] are the same, but reset block sizes differ.
This field sets the starting address of a particular address space.
RESET:
RESET:
RESET:
ADDR
ADDR
CSPAR1 Field
14
14
22
14
22
0
0
0
0
CSPA1[4]
CSPA1[3]
CSPA1[2]
CSPA1[1]
CSPA1[0]
ADDR
ADDR
13
13
21
13
21
0
0
0
0
ADDR
ADDR
12
12
20
12
20
0
0
0
0
Freescale Semiconductor, Inc.
ADDR
ADDR
11
11
19
11
19
For More Information On This Product,
0
0
*Does not apply to the CSBOOT field
0
0
Bit Field
00
01
10
11
ADDR
ADDR
10
10
18
10
18
0
0
0
0
CSPAR1 Signal
Pin Assignment Field Encoding
Go to: www.freescale.com
CSPAR1 Pin Assignments
REGISTER SUMMARY
DATA7
ADDR
ADDR
CS10
CS9
CS8
CS7
CS6
17
17
9
9
0
9
0
CSPA1[4]
Chip Select (16-Bit Port)
ADDR
ADDR
Chip Select (8-Bit Port)
16
16
8
1
8
0
8
0
Alternate Function*
Discrete Output*
Description
DATA6
ADDR
ADDR
15
15
7
7
0
7
0
CSPA1[3]
Alternate Signal
ADDR
ADDR
14
14
6
1
6
0
6
0
ADDR23
ADDR22
ADDR21
ADDR20
ADDR19
DATA5
ADDR
ADDR
13
13
5
5
0
5
0
CSPA1[2]
ADDR
ADDR
12
12
4
1
4
0
4
0
$YFFA4C–$YFFA74
DATA4
ADDR
ADDR
11
11
3
3
0
3
0
CSPA1[1]
Discrete Output
2
1
2
1
2
0
ECLK
PC6
PC5
PC4
PC3
DATA3
BLKSZ
BLKSZ
$YFFA46
$YFFA48
1
1
0
CSPA1[0]
D-13
0
1
0
1
0
0

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