MC68332ACFC25 Freescale Semiconductor, MC68332ACFC25 Datasheet - Page 263

• Manufacturer Part Number: MC68332ACFC25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332ACFC25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

MSTR 6-10, 6-17
Multimaster operation 6-10
N 5-5
Negative (N) 5-5
New queue pointer 6-9
NEWQP 6-9, 6-20, 6-22
NF 6-29
Noise errors 6-29
Noise flag (NF) 6-29
NRZ 6-26
Operand alignment 4-21
Overflow (V) 5-5
Overrun error (OR) 6-29
Parameter RAM 7-3
Parity checking 6-27
Parity enable (PE) 6-27
Parity errors 6-29
Parity flag (PF) 6-29
Parity type (PT) 6-27
PC 5-1, 5-5
PCS 6-17
PCS0/SS 6-20
PE 6-27
PEPAR 4-58
Periodic interrupt control register (PICR) 4-8
Periodic interrupt request level (PIRQL) 4-8
Periodic interrupt timer register (PITR) 4-7
Periodic interrupt vector (PIV) 4-8
Periodic timer modulus (PITM) 4-7
Periodic timer prescaler (PTP) 4-7
Peripheral chip-select signals 6-22
PF 6-29
PFPAR 4-58
PICR 4-8, 4-48
Pin control registers
Pins
PIRQ 4-48
PIRQL 4-8
PITCLK 4-7
PITM 4-7
PITR 4-7
PIV 4-8
Port QS data direction register (DDRQS) 6-4
Port QS data register (PORTQS) 6-4
Port QS pin assignment register 6-25
Port QS pin assignment register (PQSPAR) 6-3
PORTC 4-55
MC68332
USER’S MANUAL
QSM 6-3
QSPI 6-8
SCI 6-25
–O–
–N–
–P–
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PORTE 4-58
PORTF 4-58
PORTQS 6-4
PQSPAR 6-3, 6-17, 6-20, 6-25
Privilege level
Privilege levels 5-9
Processing
Program counter 5-5
Program counter (PC) 5-1
PT 6-27
PTP 4-7
QILR 6-2
QIVR 6-2
QSM 1-1, 3-2, 6-1
QSM configuration register (QSMCR) 6-2
QSM global registers 6-2
QSM initialization 6-31
QSM interrupt level register (QILR) 6-2
QSM interrupt vector register (QIVR) 6-2
QSM interrupts 6-3
QSM pin control registers 6-3
QSMCR 6-2
QSPI 6-1, 6-4
QSPI block diagram
QSPI master operation 6-12
QSPI operating modes 6-10
QSPI Pins 6-8
QSPI RAM 6-7
QSPI registers 6-6
QSPI slave operation 6-15
QSPI status register (SPSR) 6-7
Queue entry 6-9
Queue pointers 6-9
Queued serial module (QSM) 3-2, 6-1
Queued serial peripheral interface (QSPI) 6-4
R/W 4-18, 4-54
RAM, QSPI 6-7
RDR 6-28
RDRF 6-29
RE 6-28
Read cycle 4-24
Read/write (R/W) 4-18
Receive data (RXD) 6-25
supervisor 5-5
user
background 5-9
exception 5-8
halted 5-9
QSPI 6-6
command 6-8
receive 6-7
transmit 6-8
supervisor 5-2
–Q–
–R–
I-3