MC68332ACFC25 Freescale Semiconductor, MC68332ACFC25 Datasheet - Page 59

• Manufacturer Part Number: MC68332ACFC25
• Description: IC MCU 32BIT 25MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68332ACFC25

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 15
• Program Memory Type: ROMless
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

4.4.1.6 Size Signals
4.4.1.7 Function Codes
4.4.1.8 Data and Size Acknowledge Signals
MC68332
USER’S MANUAL
Size signals (SIZ[1:0]) indicate the number of bytes remaining to be transferred during
an operand cycle. They are valid while the address strobe (AS) is asserted. Table 4-
10 shows SIZ0 and SIZ1 encoding.
The CPU generates function code output signals FC[2:0] to indicate the type of activity
occurring on the data or address bus. These signals can be considered address ex-
tensions that can be externally decoded to determine which of eight external address
spaces is accessed during a bus cycle.
Address space 7 is designated CPU space. CPU space is used for control information
not normally associated with read or write bus cycles. Function codes are valid while
AS is asserted.
Table 4-11 shows address space encoding.
The supervisor bit in the status register determines whether the CPU is operating in
supervisor or user mode. Addressing mode and the instruction being executed deter-
mine whether a memory access is to program or data space.
During normal bus transfers, external devices assert the data and size acknowledge
signals (DSACK[1:0]) to indicate port width to the MCU. During a read cycle, these sig-
nals tell the MCU to terminate the bus cycle and to latch data. During a write cycle, the
signals indicate that an external device has successfully stored data and that the cycle
can terminate. DSACK[1:0] can also be supplied internally by chip-select logic. Refer
to 4.8 Chip Selects for more information.
FC2
0
0
0
0
1
1
1
1
Freescale Semiconductor, Inc.
Table 4-11 Address Space Encoding
For More Information On This Product,
SIZ1
Table 4-10 Size Signal Encoding
0
1
1
0
SYSTEM INTEGRATION MODULE
FC1
0
0
1
1
0
0
1
1
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SIZ0
1
0
1
0
FC0
0
1
0
1
0
1
0
1
Transfer Size
Long Word
Supervisor Program Space
3 Byte
Word
Supervisor Data Space
Byte
User Program Space
User Data Space
Address Space
CPU Space
Reserved
Reserved
Reserved
4-19