MPC564CVR40 Freescale Semiconductor, MPC564CVR40 Datasheet - Page 1004

• Manufacturer Part Number: MPC564CVR40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CVR40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

READI Module
24.7.7
The READI signals support Nexus (IEEE-ISTO 5001-1999) auxiliary port interface for debug. There are
two modes available, full port mode and reduced port mode. Reduced port mode allows for a 1 bit input
stream and a 2 bit output stream. Full port mode allows for a 2 bit input stream and an 8 bit output stream.
See
Steps to Enter READI (Nexus) mode:
To exit READI mode:
24.7.7.1
To enable RCPU development access via the READI signals, the reset sequence outlined below should be
used:
Refer to
24-36
1. Negate PORESET while holding JCOMP/RSTI low.
2. Configure TMS/EVTI and TDI/DSDI/MDI[0] while JCOMP/RSTI is low. (EVTI = low to enable
3. Negate JCOMP/RSTI.
4. If MDI[0] is high at JCOMP/RSTI negation, then full port mode is enabled otherwise Reduced
1. Reassert JCOMP/RSTI to disable READI.
•
•
•
•
JCOMP/RSTI
Figure 24-11
TMS/EVTI
PORESET
Nexus)
mode is selected.
Assert READI reset (RSTI), event-in (EVTI) and system reset (HRESET)
Negate RSTI
Upon negation of RSTI, tool should configure the DOR, DME, and DPA fields in the DC register
to desired setting.
Tool negates HRESET at least 16 system clocks after receiving the device ready message
MDI0
Figure 24-84
READI Signals
Reset Configuration for Debug Mode
for READI mode selection.
JTAG disabled
for further details.
Figure 24-16. Enabling Program Trace Out of System Reset
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 24-17. READI Mode Selection
READI-Config
READI-Config
READI
READI
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