MPC564CVR40 Freescale Semiconductor, MPC564CVR40 Datasheet - Page 54

• Manufacturer Part Number: MPC564CVR40
• Description: IC MPU 32BIT W/CODE COMP 388PBGA
• Manufacturer: Freescale Semiconductor
• Series: MPC5xxr

Specifications of MPC564CVR40

• Core Processor: PowerPC
• Core Size: 32-Bit
• Speed: 40MHz
• Connectivity: CAN, EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 56
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 2.7 V
• Data Converters: A/D 32x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 388-BGA
• Processor Series: MPC5xx
• Core: PowerPC
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, JTAG, QSPI, SCI, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 56
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (10 bit, 32 Channel)
• For Use With: MPC564EVB - KIT EVAL FOR MPC561/562/563/564
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

23-26
24-1
24-2
24-3
24-4
24-5
24-6
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24-9
24-10
24-11
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Figure
Number
Development Port Data Register (DPDR) ............................................................................ 23-53
READI Functional Block Diagram......................................................................................... 24-3
READI Ownership Trace Register (OTR).............................................................................. 24-9
READI Device ID Register .................................................................................................. 24-10
READI Development Control (DC) Register ....................................................................... 24-10
READI Mode Control (MC) Register .................................................................................. 24-12
READI User Base Address Register .................................................................................... 24-13
READI Read/Write Access Register .................................................................................... 24-14
READI Upload/Download Information Register ................................................................. 24-16
RWD Field Configuration .................................................................................................... 24-17
READI Data Trace Attributes 1 Register (DTA1)
READI Data Trace Attributes 2 Register (DTA2) ............................................................... 24-17
Functional Diagram of Signal Interface................................................................................ 24-22
Auxiliary Signal Packet Structure for Program Trace Indirect
Branch Message .................................................................................................................... 24-23
MSEI/MSEO Transfers......................................................................................................... 24-24
Transmission Sequence of Messages.................................................................................... 24-32
READI Module Enabled....................................................................................................... 24-34
Enabling Program Trace Out of System Reset ..................................................................... 24-36
READI Mode Selection ........................................................................................................ 24-36
READI Module Disabled...................................................................................................... 24-37
Direct Branch Message Format ............................................................................................ 24-38
Indirect Branch Message Format .......................................................................................... 24-39
Indirect Branch Message Format with Compressed Code.................................................... 24-39
Bit Pointer Format with Compressed Code .......................................................................... 24-39
Program Trace Correction Message Format ......................................................................... 24-42
Direct Branch Synchronization Message Format (PTSM = 0)............................................. 24-44
Direct Branch Synchronization Message Format (PTSM = 1)............................................. 24-44
Indirect Branch Synchronization Message Format (PTSM = 0) .......................................... 24-44
Indirect Branch Synchronization Message Format (PTSM = 1) .......................................... 24-44
Direct Branch Synchronization Message Format with Compressed
Code (PTSM = 0).................................................................................................................. 24-45
Direct Branch Synchronization Message Format with Compressed
Code (PTSM = 1).................................................................................................................. 24-45
Indirect Branch Synchronization Message Format with Compressed
Code (PTSM - 0)................................................................................................................... 24-45
Indirect Branch Synchronization Message Format with Compressed
Code (PTSM = 1).................................................................................................................. 24-45
Program Trace Full Message Format.................................................................................... 24-46
Relative Address Generation and Re-Creation ..................................................................... 24-47
MPC561/MPC563 Reference Manual, Rev. 1.2
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