MPC564CVR40 Freescale Semiconductor, MPC564CVR40 Datasheet - Page 543

IC MPU 32BIT W/CODE COMP 388PBGA

MPC564CVR40

Manufacturer Part Number
MPC564CVR40
Description
IC MPU 32BIT W/CODE COMP 388PBGA
Manufacturer
Freescale Semiconductor
Series
MPC5xxr
Datasheets

Specifications of MPC564CVR40

Core Processor
PowerPC
Core Size
32-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 2.7 V
Data Converters
A/D 32x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
388-BGA
Processor Series
MPC5xx
Core
PowerPC
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
CAN, JTAG, QSPI, SCI, SPI, UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
56
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 (10 bit, 32 Channel)
For Use With
MPC564EVB - KIT EVAL FOR MPC561/562/563/564
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC564CVR40
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Chapter 14
QADC64E Enhanced Mode Operation
The two queued analog-to-digital converter (QADC) modules on the MPC561/MPC563 devices are
10-bit, unipolar, successive approximation converters. The modules can be configured to operate in one of
two modes, legacy mode (for MPC555 compatibility) and enhanced mode. This chapter describes how the
module operates in enhanced mode. Refer to
information regarding the QADC64E functionality in legacy mode.
For this revision of the QADC, the name QADC64E implies the enhanced version of the QADC64
module, not just enhanced mode of operation. For simplicity, the names QADC and QADC64E may be
used interchangeably throughout this document.
14.1
Figure 14-1
Freescale Semiconductor
EXTERNAL
Triggers
QADC64E Block Diagram
displays the major components of the QADC64E modules on the MPC561/MPC563.
CONTROL
DIGITAL
IMB3
MUX Address
EXTERNAL
BUS INTERFACE UNIT
MPC561/MPC563 Reference Manual, Rev. 1.2
Figure 14-1. QADC64E Block Diagram
(BIU)
Command Words (CCW), 64 Entries
Queues OF 10-BIT Conversion
ANALOG Input Multiplexor and
DIGITAL Signal Functions
Chapter 13, “QADC64E Legacy Mode
Up to 16 ANALOG
Input Signals
10-bit ANALOG to DIGITAL CONVERTER
REFERENCE
10-bit RESULT Table,
Inputs
RESULT Alignment
64 Entries
10-bit to 16-bit
ANALOG POWER
Operation,” for
Inputs
14-1

Related parts for MPC564CVR40