LPC1113FHN33/302,5 NXP Semiconductors, LPC1113FHN33/302,5 Datasheet - Page 10

IC MCU LV 32BIT 24K FLAS 32VQFN

LPC1113FHN33/302,5

Manufacturer Part Number
LPC1113FHN33/302,5
Description
IC MCU LV 32BIT 24K FLAS 32VQFN
Manufacturer
NXP Semiconductors
Series
LPC1100Lr
Datasheet

Specifications of LPC1113FHN33/302,5

Featured Product
LPC1100L 32-Bit MCU
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
LPC1113
Core
ARM Cortex-M0
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART, SPI, SSP
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
42
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-5148
NXP Semiconductors
Table 3.
LPC1111_12_13_14
Product data sheet
Symbol
SWCLK/PIO0_10/
SCK0/
CT16B0_MAT2
R/PIO0_11/
AD0/CT32B0_MAT3
PIO1_0 to PIO1_11
R/PIO1_0/
AD1/CT32B1_CAP0
R/PIO1_1/
AD2/CT32B1_MAT0
R/PIO1_2/
AD3/CT32B1_MAT1
SWDIO/PIO1_3/
AD4/CT32B1_MAT2
PIO1_4/AD5/
CT32B1_MAT3/
WAKEUP
LPC1113/14 pin description table (LQFP48 package)
Pin
29
32
33
34
35
39
40
[3]
[5]
[5]
[5]
[5]
[5]
[5]
Start
logic
input
yes
yes
yes
no
no
no
no
Type
I
I/O
I/O
O
I
I/O
I
O
I
I/O
I
I
O
I/O
I
O
I
I/O
I
O
I/O
I/O
I
O
I/O
I
O
I
I/O
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 February 2011
Reset
state
[1]
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
I; PU
-
-
-
Description
SWCLK — Serial wire clock.
PIO0_10 — General purpose digital input/output pin.
SCK0 — Serial clock for SPI0.
CT16B0_MAT2 — Match output 2 for 16-bit timer 0.
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO0_11 — General purpose digital input/output pin.
AD0 — A/D converter, input 0.
CT32B0_MAT3 — Match output 3 for 32-bit timer 0.
Port 1 — Port 1 is a 12-bit I/O port with individual direction and
function controls for each bit. The operation of port 1 pins
depends on the function selected through the IOCONFIG
register block.
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO1_0 — General purpose digital input/output pin.
AD1 — A/D converter, input 1.
CT32B1_CAP0 — Capture input 0 for 32-bit timer 1.
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO1_1 — General purpose digital input/output pin.
AD2 — A/D converter, input 2.
CT32B1_MAT0 — Match output 0 for 32-bit timer 1.
R — Reserved. Configure for an alternate function in the
IOCONFIG block.
PIO1_2 — General purpose digital input/output pin.
AD3 — A/D converter, input 3.
CT32B1_MAT1 — Match output 1 for 32-bit timer 1.
SWDIO — Serial wire debug input/output.
PIO1_3 — General purpose digital input/output pin.
AD4 — A/D converter, input 4.
CT32B1_MAT2 — Match output 2 for 32-bit timer 1.
PIO1_4 — General purpose digital input/output pin with 10 ns
glitch filter.
AD5 — A/D converter, input 5.
CT32B1_MAT3 — Match output 3 for 32-bit timer 1.
WAKEUP — Deep power-down mode wake-up pin with 20 ns
glitch filter. This pin must be pulled HIGH externally to enter
Deep power-down mode and pulled LOW to exit Deep
power-down mode. A LOW-going pulse as short as 50 ns
wakes up the part.
…continued
32-bit ARM Cortex-M0 microcontroller
LPC1111/12/13/14
© NXP B.V. 2011. All rights reserved.
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