LPC1113FHN33/302,5 NXP Semiconductors, LPC1113FHN33/302,5 Datasheet - Page 44

IC MCU LV 32BIT 24K FLAS 32VQFN

LPC1113FHN33/302,5

Manufacturer Part Number
LPC1113FHN33/302,5
Description
IC MCU LV 32BIT 24K FLAS 32VQFN
Manufacturer
NXP Semiconductors
Series
LPC1100Lr
Datasheet

Specifications of LPC1113FHN33/302,5

Featured Product
LPC1100L 32-Bit MCU
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, WDT
Number Of I /o
28
Program Memory Size
24KB (24K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad
Processor Series
LPC1113
Core
ARM Cortex-M0
Data Bus Width
32 bit
Data Ram Size
8 KB
Interface Type
I2C, UART, SPI, SSP
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
42
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-5148
NXP Semiconductors
LPC1111_12_13_14
Product data sheet
9.4 Peripheral power consumption
The supply current per peripheral is measured as the difference in supply current between
the peripheral block enabled and the peripheral block disabled in the SYSAHBCLKCFG
and PDRUNCFG (for analog blocks) registers. All other blocks are disabled in both
registers and no code is executed. Measured on a typical sample at T
noted otherwise, the system oscillator and PLL are running in both measurements.
The supply currents are shown for system clock frequencies of 12 MHz and 48 MHz.
Table 10.
Peripheral
IRC
System oscillator
at 12 MHz
Watchdog
oscillator at
500 kHz/2
BOD
Main PLL
ADC
CLKOUT
CT16B0
CT16B1
CT32B0
CT32B1
GPIO
IOCONFIG
I2C
ROM
SPI0
SPI1
UART
WDT
Power consumption for individual analog and digital blocks
All information provided in this document is subject to legal disclaimers.
Typical supply current in
mA
n/a
0.27
0.22
0.004
0.051
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Rev. 4 — 10 February 2011
12 MHz 48 MHz
-
-
-
-
0.21
0.08
0.12
0.02
0.02
0.02
0.02
0.23
0.03
0.04
0.04
0.12
0.12
0.22
0.02
-
-
-
-
-
0.29
0.47
0.06
0.06
0.07
0.06
0.88
0.10
0.13
0.15
0.45
0.45
0.82
0.06
Notes
System oscillator running; PLL off; independent
of main clock frequency.
IRC running; PLL off; independent of main clock
frequency.
System oscillator running; PLL off; independent
of main clock frequency.
Independent of main clock frequency.
Main clock divided by 4 in the CLKOUTDIV
register.
GPIO pins configured as outputs and set to
LOW. Direction and pin state are maintained if
the GPIO is disabled in the SYSAHBCLKCFG
register.
Main clock selected as clock source for the
WDT.
32-bit ARM Cortex-M0 microcontroller
LPC1111/12/13/14
amb
© NXP B.V. 2011. All rights reserved.
= 25 °C. Unless
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