LPC1113FHN33/302,5 NXP Semiconductors, LPC1113FHN33/302,5 Datasheet - Page 2

• Manufacturer Part Number: LPC1113FHN33/302,5
• Description: IC MCU LV 32BIT 24K FLAS 32VQFN
• Manufacturer: NXP Semiconductors
• Series: LPC1100Lr

Specifications of LPC1113FHN33/302,5

• Featured Product: LPC1100L 32-Bit MCU
• Core Processor: ARM Cortex-M0
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 28
• Program Memory Size: 24KB (24K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 32-VQFN Exposed Pad
• Processor Series: LPC1113
• Core: ARM Cortex-M0
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, UART, SPI, SSP
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 42
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-5148

NXP Semiconductors
3. Applications
LPC1111_12_13_14
Product data sheet
Analog peripherals:
Serial interfaces:
Clock generation:
Power control:
Unique device serial number for identification.
Single power supply (1.8 V to 3.6 V).
Available as 48-pin LQFP package, 33-pin HVQFN package, and 44-pin PLCC
package.
eMetering
Alarm systems
10-bit ADC with input multiplexing among 8 pins.
UART with fractional baud rate generation, internal FIFO, and RS-485 support.
Two SPI controllers with SSP features and with FIFO and multi-protocol
capabilities (second SPI on LQFP48 and PLCC44 packages only).
I
data rate of 1 Mbit/s with multiple address recognition and monitor mode.
12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used
as a system clock.
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
Programmable watchdog oscillator with a frequency range of 7.8 kHz to 1.8 MHz.
PLL allows CPU operation up to the maximum CPU rate without the need for a
high-frequency crystal. May be run from the system oscillator or the internal RC
oscillator.
Clock output function with divider that can reflect the system oscillator clock, IRC
clock, CPU clock, and the Watchdog clock.
Integrated PMU (Power Management Unit) to minimize power consumption during
Sleep, Deep-sleep, and Deep power-down modes.
Power profiles residing in boot ROM allowing to optimize performance and
minimize power consumption for any given application through one simple function
call. (LPC1100L series, on LPC111x/102/202/302 only.)
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
Processor wake-up from Deep-sleep mode via a dedicated start logic using up to
13 of the functional pins.
Power-On Reset (POR).
Brownout detect with four separate thresholds for interrupt and forced reset.
2
C-bus interface supporting full I
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 10 February 2011
2
C-bus specification and Fast-mode Plus with a
Lighting
White goods
32-bit ARM Cortex-M0 microcontroller
LPC1111/12/13/14
© NXP B.V. 2011. All rights reserved.
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