LPC2378FBD144 NXP Semiconductors, LPC2378FBD144 Datasheet - Page 28

• Manufacturer Part Number: LPC2378FBD144
• Description: MCU 32BIT ARM7, 10/100, USB, CAN
• Manufacturer: NXP Semiconductors

Specifications of LPC2378FBD144

• Core Size: 32bit
• No. Of I/o's: 104
• Program Memory Size: 512KB
• Ram Memory Size: 58KB
• Cpu Speed: 72MHz
• Oscillator Type: External, Internal
• No. Of Timers: 4
• No. Of Pwm Channels: 6
• Digital Ic Case: RoHS Compliant
• Controller Family/series: LPC23xx
• Rohs Compliant: Yes

NXP Semiconductors
LPC2377_78
Product data sheet
7.21.1 Features
7.21 General purpose 32-bit timers/external event counters
7.22 Pulse width modulator
The LPC2377/78 include four 32-bit Timer/Counters. The Timer/Counter is designed to
count cycles of the system derived clock or an externally-supplied clock. It can optionally
generate interrupts or perform other actions at specified timer values, based on four
match registers. The Timer/Counter also includes four capture inputs to trap the timer
value when an input signal transitions, optionally generating an interrupt.
The PWM is based on the standard Timer block and inherits all of its features, although
only the PWM function is pinned out on the LPC2377/78. The Timer is designed to count
cycles of the system derived clock and optionally switch pins, generate interrupts or
perform other actions when specified timer values occur, based on seven match registers.
The PWM function is in addition to these features, and is based on match register events.
The ability to separately control rising and falling edge locations allows the PWM to be
used for more applications. For instance, multi-phase motor control typically requires
three non-overlapping PWM outputs with individual control of all three pulse widths and
positions.
Two match registers can be used to provide a single edge controlled PWM output. One
match register (PWMMR0) controls the PWM cycle rate, by resetting the count upon
match. The other match register controls the PWM edge position. Additional single edge
controlled PWM outputs require only one match register each, since the repetition rate is
the same for all PWM outputs. Multiple single edge controlled PWM outputs will all have a
rising edge at the beginning of each PWM cycle, when an PWMMR0 match occurs.
•
•
•
•
•
A 32-bit Timer/Counter with a programmable 32-bit prescaler.
Counter or Timer operation.
Up to four 32-bit capture channels per timer, that can take a snapshot of the timer
value when an input signal transitions. A capture event may also optionally generate
an interrupt.
Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
Up to four external outputs corresponding to match registers, with the following
capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 17 June 2010
Single-chip 16-bit/32-bit microcontrollers
LPC2377/78
© NXP B.V. 2010. All rights reserved.
28 of 68