EP3SL150F780I3N Altera, EP3SL150F780I3N Datasheet - Page 544
EP3SL150F780I3N
Manufacturer Part Number
EP3SL150F780I3N
Description
Stratix III
Manufacturer
Altera
Datasheet
1.EP3SL110.pdf
(904 pages)
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I/O Timing
1–32
Stratix III Device Handbook, Volume 2
Notes:
(1)
(2)
(3)
(4)
(5)
1.8v HSTL
CLASS II
1.5v HSTL
CLASS I
1.5v HSTL
CLASS II
1.2v HSTL
CLASS I
1.2v HSTL
CLASS II
Differential SSTL-2
CLASS I
Differential SSTL-2
CLASS II
Differential SSTL-
18 CLASS I
Differential SSTL-
18 CLASS II
1.8v Differential
HSTL CLASS I
1.8v Differential
HSTL CLASS II
1.5v Differential
HSTL CLASS I
1.5v Differential
HSTL CLASS II
LVDS
Table 1–35. Output Timing Measurement methodology for Output Pins (Part 2 of 2)
I/O Standard
Hyper transport is not supported by Stratix III.
LVPECL outputs are not supported by Stratix III.
Quartus timing conditions can be changed using the Advanced I/O Timing feature.
V
Terminated I/O standards require an additional 30 mV IR drop on Vcc (1.02 v).
CC
is nominally 1.1 v less 50 mV (1.05 v).
R
25
25
25
25
—
—
—
—
—
—
—
—
—
—
S
100
R
—
—
—
—
—
—
—
—
—
—
—
—
—
D
R
25
50
25
50
25
50
25
50
25
50
25
50
25
—
T
Loading and Terminations
V
1.375
1.375
2.325
2.325
1.375
1.375
2.375
1.66
1.09
1.09
1.66
1.66
1.66
1.66
C C I O
V
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
2.325
C C P D
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
1.02
V
C C
0.773
0.634
0.634
0.512
0.512
1.099
1.099
0.773
0.773
0.773
0.773
0.634
0.634
V
—
T T
Altera Corporation
November 2007
C
L
(pF)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Measurement
V
M E A S
0.6875
0.6875
1.1625
1.1625
0.6875
0.6875
1.1875
0.545
0.545
Point
0.83
0.83
0.83
0.83
0.83
(v)
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