ISP1507BBS,118 NXP Semiconductors, ISP1507BBS,118 Datasheet - Page 12

• Manufacturer Part Number: ISP1507BBS,118
• Description: RF Transceiver USB 2.0 ULPI TRNSCVR
• Manufacturer: NXP Semiconductors

Specifications of ISP1507BBS,118

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Power Supply Requirement: Single
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Pin Count: 32
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / RoHS Status: Compliant
• Other names: 935285495118 ISP1507BBS-T

NXP Semiconductors
ISP1507A_ISP1507B_1
Product data sheet
7.9.2 V
7.9.3 RREF
7.9.4 DP and DM
7.9.5 FAULT
7.9.6 ID
7.9.7 CPGND
The input power pin that sets the I/O voltage level. For details, see
and
Resistor reference analog I/O pin. A resistor, R
and GND, as shown in
biases internal analog circuitry. Less accurate resistors cannot be used and will render the
ISP1507 unusable.
The DP (data plus) and DM (data minus) are USB differential data pins. These must be
connected to the D+ and D pins of the USB receptacle.
If an external V
circuit can be connected to the ISP1507 FAULT input pin. The ISP1507 will inform the link
of V
must:
If the FAULT pin is not used, it is recommended to connect to GND.
For OTG implementations, the ID (identification) pin is connected to the ID pin of the
micro-USB receptacle. As defined in On-The-Go Supplement to the USB 2.0 Specification
Rev. 1.3 , the ID pin dictates the initial role of the link. If ID is detected as HIGH, the link
must assume the role of a peripheral. If ID is detected as LOW, the link must assume a
host role. Roles can be swapped at a later time by using HNP.
If the ISP1507 is not used as an OTG PHY, but as a standard USB host or peripheral PHY,
the ID pin must be connected to REG3V3.
CPGND indicates the analog ground for the on-board charge pump. CPGND must always
be connected to ground, even when the charge pump is not used.
•
•
•
•
•
•
•
•
•
•
CC(I/O)
CHIP_SELECT_N
CLOCK
DATA[7:0]
DIR
NXT
RESET_N
STP
BUS
Set the USE_EXT_VBUS_IND register bit to logic 1.
Set the polarity of the external fault signal using the IND_COMPL register bit.
Set the IND_PASSTHRU register bit to logic 1.
Section
fault events by sending RXCMDs on the ULPI bus. To use the FAULT pin, the link
16. V
BUS
CC(I/O)
overcurrent or fault circuit is used, the output fault indicator of that
Section
Rev. 01 — 19 May 2008
provides power to on-chip pads of the following pins:
16. This provides an accurate voltage reference that
ISP1507A; ISP1507B
RREF
, must be connected between RREF
ULPI HS USB OTG transceiver
Section
© NXP B.V. 2008. All rights reserved.
12,
Section 13
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