ISP1507BBS,118 NXP Semiconductors, ISP1507BBS,118 Datasheet - Page 35

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ISP1507BBS,118

Manufacturer Part Number
ISP1507BBS,118
Description
RF Transceiver USB 2.0 ULPI TRNSCVR
Manufacturer
NXP Semiconductors
Datasheet

Specifications of ISP1507BBS,118

Number Of Transceivers
1
Esd Protection
YeskV
Power Supply Requirement
Single
Operating Supply Voltage (typ)
3.3V
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Dual Supply Voltage (typ)
Not RequiredV
Dual Supply Voltage (max)
Not RequiredV
Dual Supply Voltage (min)
Not RequiredV
Pin Count
32
Mounting
Surface Mount
Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Lead Free Status / RoHS Status
Compliant
Other names
935285495118 ISP1507BBS-T
NXP Semiconductors
Table 17.
ISP1507A_ISP1507B_1
Product data sheet
Parameter name
RXCMD delay (J and K)
RXCMD delay (SE0)
TX start delay
TX end delay (packets)
TX end delay (SOF)
RX start delay
RX end delay
Fig 14. Example of using the ISP1507 to transmit and receive USB data
DATA[7:0]
CLOCK
NXT
STP
DIR
PHY pipeline delays
9.8.1.1 ISP1507 pipeline delays
9.8.1.2 Allowed link decision time
9.8.1 USB packet timing
9.8 USB packet transmit and receive
An example of a packet transmit and receive is shown in
packets, refer to UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1 .
The ISP1507 delays are shown in
Pin Interface (ULPI) Specification Rev. 1.1, Section 3.8.2.6.2 .
The amount of clock cycles allocated to the link to respond to a received packet and
correctly receive back-to-back packets is given in
values given in
packet sequences and timing are shown in
UTMI+ Low Pin Interface (ULPI) Specification Rev. 1.1, Section 3.8.2.6.3 .
link sends
TXCMD
TXCMD
High-speed PHY delay
1 to 2
3 to 4
6 to 9
5 to 6
5 to 6
4
4
ISP1507
TXCMD
accepts
Table 18
the next data;
DATA
link sends
ISP1507
accepts
Rev. 01 — 19 May 2008
for correct USB system operation. Examples of high-speed
end of data
link signals
Table
Full-speed PHY delay
4
4 to 6
6 to 10
not applicable
not applicable
not applicable
17 to 18
17. For a detailed description, refer to UTMI+ Low
ULPI bus
is idle
Figure 15
ISP1507A; ISP1507B
turnaround
asserts DIR,
turnaround
ISP1507
Table
causing
cycle
and
18. Link designs must follow
RXCMD
Figure
ULPI HS USB OTG transceiver
(NXT LOW)
Figure
ISP1507
RXCMD
sends
Low-speed PHY delay
4
16 to 18
74 to 75
not applicable
not applicable
not applicable
122 to 123
14. For details on USB
16. For details, refer to
DATA
(NXT HIGH)
USB data
ISP1507
sends
© NXP B.V. 2008. All rights reserved.
turnaround
DIR, causing
turnaround
deasserts
ISP1507
cycle
004aab039
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