ISP1507BBS,118 NXP Semiconductors, ISP1507BBS,118 Datasheet - Page 52

• Manufacturer Part Number: ISP1507BBS,118
• Description: RF Transceiver USB 2.0 ULPI TRNSCVR
• Manufacturer: NXP Semiconductors

Specifications of ISP1507BBS,118

• Number Of Transceivers: 1
• Esd Protection: YeskV
• Power Supply Requirement: Single
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Dual Supply Voltage (typ): Not RequiredV
• Dual Supply Voltage (max): Not RequiredV
• Dual Supply Voltage (min): Not RequiredV
• Pin Count: 32
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / RoHS Status: Compliant
• Other names: 935285495118 ISP1507BBS-T

NXP Semiconductors
Table 29.
Table 30.
ISP1507A_ISP1507B_1
Product data sheet
Bit
Symbol
Reset
Access
Bit
7
6
5
4
3
Symbol
USE_EXT_VBUS_
IND
DRV_VBUS_EXT
DRV_VBUS
CHRG_VBUS
DISCHRG_VBUS
OTG_CTRL - OTG Control register (address R = 0Ah to 0Ch, W = 0Ah, S = 0Bh, C = 0Ch) bit allocation
OTG_CTRL - OTG Control register (address R = 0Ah to 0Ch, W = 0Ah, S = 0Bh, C = 0Ch) bit
description
USE_EXT_
VBUS_IND
10.1.4 OTG_CTRL register
R/W/S/C
7
0
This register controls various OTG functions of the ISP1507. The bit allocation of the
OTG_CTRL register is given in
VBUS_EXT
Description
Use External V
0b — Use the internal OTG comparator (default).
1b — Use the external V
Drive V
external charge pump or a 5 V supply is optional.
0b — Drive V
(default).
1b — Drive V
Drive V
then setting DRV_VBUS is optional.
0b — Do not drive V
1b — Drive 5 V on V
Charge V
first check that V
data lines have been LOW (SE0) for 2 ms.
0b — Do not charge V
1b — Charge V
Discharge V
for an RXCMD indicating that SESS_END has changed from 0 to 1, and then resets this bit to
0 to stop the discharge.
0b — Do not discharge V
1b — Discharge V
R/W/S/C
DRV_
6
0
BUS
BUS
BUS
: Signals the ISP1507 to drive 5 V on V
External: Selects between the internal and external 5 V V
BUS
: Charges V
BUS
BUS
R/W/S/C
DRV_
VBUS
BUS
BUS
BUS
: Discharges V
using the internal charge pump. Also ensures PSW_N is not driven to LOW
using the external charge pump or the 5 V supply. Drives PSW_N to LOW.
5
0
BUS
.
Indicator: Informs the PHY to use an external V
BUS
BUS
is discharged (see bit DISCHRG_VBUS), and that both the DP and DM
.
Rev. 01 — 19 May 2008
BUS
.
(default).
BUS
BUS
BUS
(default).
R/W/S/C
CHRG_
valid indicator signal input from the FAULT pin.
VBUS
through a resistor. Used for the V
(default).
Table
BUS
4
0
through a resistor. If the link sets this bit to logic 1, it waits
29.
DISCHRG_
R/W/S/C
VBUS
3
0
ISP1507A; ISP1507B
BUS
. If DRV_VBUS_EXT is set to logic 1,
DM_PULL
R/W/S/C
DOWN
ULPI HS USB OTG transceiver
2
1
BUS
pulsing SRP. The link must
BUS
DP_PULL
R/W/S/C
BUS
DOWN
overcurrent indicator.
1
1
supply. Using an
© NXP B.V. 2008. All rights reserved.
ID_PULL
R/W/S/C
UP
0
0
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