ADSP-2187LKSTZ-210 Analog Devices Inc, ADSP-2187LKSTZ-210 Datasheet - Page 34

• Manufacturer Part Number: ADSP-2187LKSTZ-210
• Description: IC DSP CONTRLR 16BIT 100-TQFP
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-2187LKSTZ-210

• Interface: Host Interface, Serial Port
• Clock Rate: 52MHz
• Non-volatile Memory: External
• On-chip Ram: 160kB
• Voltage - I/o: 3.30V
• Voltage - Core: 3.30V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Device Core Size: 16b
• Format: Fixed Point
• Clock Freq (max): 52.5MHz
• Mips: 52.5
• Device Input Clock Speed: 52.5MHz
• Ram Size: 160KB
• Program Memory Size: Not RequiredKB
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ADSP-2187LKSTZ210

ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
IDMA Read, Short Read Cycle
Table 24. IDMA Read, Short Read Cycle
1
2
3
4
5
6
7
8
Parameter
Timing Requirements:
t
t
t
Switching Characteristics:
t
t
t
t
t
Short Read Only must be disabled in the IDMA overlay memory mapped register. This mode is disabled by clearing (=0) Bit 14 of the IDMA overlay register, and is disabled
Consider using the Short Read Only mode, instead, because Short Read mode is not applicable at high clock frequencies.
Start of Read = IS Low and IRD Low.
DM Read or first half of PM Read.
For the ADSP-2186L, this specification also has a max value of 2t
Second half of PM Read.
For the ADSP-2186L, this specification also has a max value of t
End of Read = IS High or IRD High.
IKR
IRP1
IRP2
IKHR
IKDH
IKDD
IRDE
IRDV
by default upon reset.
1, 2
IACK Low Before Start of Read
Duration of Read (DM/PM1)
Duration of Read (PM2)
IACK High After Start of Read
IAD15–0 Data Hold After End of Read
IAD15–0 Data Disabled After End of Read
IAD15–0 Previous Data Enabled After Start of Read
IAD15–0 Previous Data Valid After Start of Read
IAD15–0
IACK
IRD
6, 7
IS
4, 5
3
3
Figure 26. IDMA Read, Short Read Cycle
t
Rev. C | Page 34 of 48 | January 2008
IKR
CK
CK
t
IRDE
– 5 max.
– 5.
8
8
t
t
IKHR
IRDV
t
IRPx
PREVIOUS
DATA
t
IKDD
Min
0
15
15
0
0
t
IKDH
Max
15
10
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns