XC3S200AN-4FTG256C Xilinx Inc, XC3S200AN-4FTG256C Datasheet - Page 2

IC SPARTAN-3AN FPGA 200K 256FTBG

XC3S200AN-4FTG256C

Manufacturer Part Number
XC3S200AN-4FTG256C
Description
IC SPARTAN-3AN FPGA 200K 256FTBG
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr

Specifications of XC3S200AN-4FTG256C

Total Ram Bits
294912
Number Of Logic Elements/cells
4032
Number Of Labs/clbs
448
Number Of I /o
195
Number Of Gates
200000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-LBGA
No. Of Logic Blocks
4032
No. Of Gates
200000
No. Of Macrocells
4032
Family Type
Spartan-3AN
No. Of Speed Grades
4
No. Of I/o's
195
Package
256FTBGA
Family Name
Spartan®-3AN
Device Logic Units
4032
Device System Gates
200000
Maximum Internal Frequency
667 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
195
Ram Bits
294912
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1553

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DS557 (v4.1) April 1, 2011
Introduction
The Spartan®-3AN FPGA family combines the best attributes
of a leading edge, low cost FPGA with nonvolatile technology
across a broad range of densities. The family combines all the
features of the Spartan-3A FPGA family plus leading
technology in-system Flash memory for configuration and
nonvolatile data storage.
The Spartan-3AN FPGAs are part of the Extended Spartan-3A
family, which also includes the Spartan-3A FPGAs and the
higher density Spartan-3A DSP FPGAs. The Spartan-3AN
FPGA family is excellent for space-constrained applications
such as blade servers, medical devices, automotive
infotainment, telematics, GPS, and other small consumer
products. Combining FPGA and Flash technology minimizes
chip count, PCB traces and overall size while increasing
system reliability.
The Spartan-3AN FPGA internal configuration interface is
completely self-contained, increasing design security. The
family maintains full support for external configuration. The
Spartan-3AN FPGA is the world’s first nonvolatile FPGA with
MultiBoot, supporting two or more configuration files in one
device, allowing alternative configurations for field upgrades,
test modes, or multiple system configurations.
Features
Table 2: Summary of Spartan-3AN FPGA Attributes
Notes:
1.
© Copyright 2007–2011 Xilinx, Inc. XILINX, the Xilinx logo, Virtex, Spartan, ISE, and other designated brands included herein are trademarks of Xilinx in the United States and
other countries. PCI and PCI-X are trademarks of PCI-SIG and used under license. All other trademarks are the property of their respective owners.
DS557 (v4.1) April 1, 2011
Product Specification
XC3S50AN
XC3S200AN
XC3S400AN
XC3S700AN
XC3S1400AN
Device
The new standard for low cost nonvolatile FPGA solutions
Eliminates traditional nonvolatile FPGA limitations with the
advanced 90 nm Spartan-3A device feature set
Integrated robust configuration memory
Plentiful amounts of nonvolatile memory available to the user
Robust 100K Flash memory program/erase cycles
By convention, one Kb is equivalent to 1,024 bits and one Mb is equivalent to 1,024 Kb.
Memory, multipliers, DCMs, SelectIO, hot swap, power
management, etc.
Saves board space
Improves ease-of-use
Simplifies design
Reduces support issues
Up to 11+ Mb available
MultiBoot support
Embedded processing and code shadowing
Scratchpad memory
System
1400K
Gates
200K
400K
700K
50K
Equivalent
13,248
25,344
Logic
1,584
4,032
8,064
Cells
CLBs
1,472
2,816
176
448
896
9
11,264
Slices
1,792
3,584
5,888
704
Distributed
Bits
RAM
176K
11K
28K
56K
92K
(1)
www.xilinx.com
Introduction and Ordering Information
Bits
Block
288K
360K
360K
576K
RAM
54K
(1)
Multipliers DCMs
Dedicated
20 years Flash memory data retention
Security features provide bitstream anti-cloning protection
Configuration watchdog timer automatically recovers from
configuration errors
Suspend mode reduces system power consumption
Full hot-swap compliance
Multi-voltage, multi-standard SelectIO™ interface pins
Abundant, flexible logic resources
Hierarchical SelectRAM™ memory architecture
Up to eight Digital Clock Managers (DCMs)
Eight global clocks and eight additional clocks per each half
of device, plus abundant low-skew routing
Complete Xilinx® ISE® and WebPACK™ software
development system support
MicroBlaze™ and PicoBlaze embedded processor cores
Fully compliant 32-/64-bit 33 MHz PCI™ technology support
Low-cost QFP and BGA Pb-free (RoHS) packaging options
16
20
20
32
3
Buried configuration interface
Unique Device DNA serial number in each device for
design Authentication to prevent unauthorized copying
Flash memory sector protection and lockdown
Retains all design state and FPGA configuration data
Fast response time, typically less than 100 s
Up to 502 I/O pins or 227 differential signal pairs
LVCMOS, LVTTL, HSTL, and SSTL single-ended signal
standards
3.3V, 2.5V, 1.8V, 1.5V, and 1.2V signaling
Up to 24 mA output drive
3.3V 10% compatibility and hot swap compliance
622+ Mb/s data transfer rate per I/O
DDR/DDR2 SDRAM support up to 400 Mb/s
LVDS, RSDS, mini-LVDS, PPDS, and HSTL/SSTL
differential I/O
Densities up to 25,344 logic cells
Optional shift register or distributed RAM support
Enhanced 18 x 18 multipliers with optional pipeline
Up to 576 Kbits of dedicated block RAM
Up to 176 Kbits of efficient distributed RAM
Pin-compatible with the same packages in the
Spartan-3A FPGA family
Spartan-3AN FPGA Family:
2
4
4
8
8
Maximum
User I/O
144
195
311
372
502
Differential
Maximum
I/O Pairs
142
165
227
64
90
Product Specification
Bitstream
Size
1,168K
1,842K
2,669K
4,644K
427K
(1)
In-System
Flash Bits
16M
1M
4M
4M
8M
2

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