XCV1600E-6BG560I Xilinx Inc, XCV1600E-6BG560I Datasheet - Page 78

• Manufacturer Part Number: XCV1600E-6BG560I
• Description: IC FPGA 1.8V I-TEMP 560-MBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-Er

Specifications of XCV1600E-6BG560I

• Number Of Logic Elements/cells: 34992
• Number Of Labs/clbs: 7776
• Total Ram Bits: 589824
• Number Of I /o: 404
• Number Of Gates: 2188742
• Voltage - Supply: 1.71 V ~ 1.89 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 560-LBGA, Metal
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Virtex™-E 1.8 V Field Programmable Gate Arrays
Virtex-E Pin-to-Pin Output Parameter Guidelines
All devices are 100% functionally tested. Listed below are representative values for typical pin locations and normal clock
loading. Values are expressed in nanoseconds unless otherwise noted.
Global Clock Input to Output Delay for LVTTL, 12 mA, Fast Slew Rate, with DLL
Module 3 of 4
18
Notes:
1.
2.
3.
LVTTL Global Clock Input to Output Delay using
Output Flip-flop, 12 mA, Fast Slew Rate, with
DLL. For data output with different standards,
adjust the delays with the values shown in
Output Switching Characteristics Standard
Adjustments, page
Listed above are representative values where one global clock input drives one vertical clock line in each accessible column, and
where all accessible IOB and CLB flip-flops are clocked by the global clock net.
Output timing is measured at 50% V
Table 3
DLL output jitter is already included in the timing calculation.
and
Table
Description
4.
10.
(1)
CC
threshold with 35 pF external capacitive load. For other I/O standards and different loads, see
IOB
T
Symbol
ICKOFDLL
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Device
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Production Product Specification
3.1
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-8
DS022-3 (v2.9.2) March 14, 2003
3.1
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Units
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R