CY7C68013A-128AXI Cypress Semiconductor Corp, CY7C68013A-128AXI Datasheet - Page 61

• Manufacturer Part Number: CY7C68013A-128AXI
• Description: IC MCU USB PERIPH HI SPD 128LQFP
• Manufacturer: Cypress Semiconductor Corp
• Series: EZ-USB FX2LP™r

Specifications of CY7C68013A-128AXI

• Program Memory Type: ROMless
• Package / Case: 128-LQFP
• Applications: USB Microcontroller
• Core Processor: 8051
• Controller Series: CY7C680xx
• Ram Size: 16K x 8
• Interface: I²C, USB, USART
• Number Of I /o: 40
• Voltage - Supply: 3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Processor Series: CY7C68xx
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, USART, USB
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 40
• Number Of Timers: 3
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: CY3684
• Minimum Operating Temperature: - 40 C
• Controller Family/series: (8051) USB
• Core Size: 8 Bit
• No. Of I/o's: 40
• Program Memory Size: 16KB
• Cpu Speed: 48MHz
• No. Of Timers: 3
• Embedded Interface Type: I2C, USART, USB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CY4611B - KIT USB TO ATA REFERENCE DESIGN428-1677 - KIT DEVELOPMENT EZ-USB FX2LP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 428-1943; CY7C68013A-128AXI

Document History Page
Document #: 38-08032 Rev. *M
REV. ECN NO.
Document Title: CY7C68013A, CY7C68014A, CY7C68015A, CY7C68016A, EZ-USB FX2LP™ USB Microcontroller High
Speed USB Peripheral Controller
Document Number: 38-08032
*G
*A
*B
*C
*D
*E
*F
*H
*J
**
*I
124316
128461
130335
131673
230713
242398
397239
271169
316313
338901
371097
Submission
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
See ECN
03/17/03
09/02/03
10/09/03
02/12/04
Date
Change
Orig. of
MON
MON
MON
MON
MON
TMD
VCS
VCS
KKV
KKU
KKU
New data sheet
Added PN CY7C68015A throughout data sheet
Modified
Removed word “compatible” where associated with I
Corrected grammar and formatting in various locations
Updated Sections 3.2.1, 3.9, 3.11,
Added Sections 3.15, 3.18.4, 3.20
Modified
Updated
Restored PRELIMINARY to header (had been removed in error from rev. *A)
Section 8.1 changed “certified” to “compliant”
Table 14
Added Sequence diagrams Section 9.16
Updated Ordering information with lead-free parts
Updated Registry Summary
Section 3.12.4:example changed to column 8 from column 9
Updated
Updated section 3.9 (reset)
Updated section 3.15 ECC Generation
Changed Lead free Marketing part numbers in
Minor Change: data sheet posted to the web,
Added USB-IF Test ID number
Added USB 2.0 logo
Added values for Isusp, Icc, Power Dissipation, Vih_x, Vil_x
Changed VCC from + 10% to + 5%
Changed E-Pad size to 4.3 mm x 5.0 mm
Changed PKTEND to FLAGS output propagation delay (asynchronous interface) in
Table 28
Removed CY7C68013A-56PVXCT part availability
Added parts ideal for battery powered applications: CY7C68014A, CY7C68016A
Provided additional timing restrictions and requirement about the use of PKETEND pin to
commit a short one byte/word packet subsequent to committing a packet automatically
(when in auto mode).
Added Min Vcc Ramp Up time (0 to 3.3v)
Added information about the AUTOPTR1/AUTOPTR2 address timing with regards to data
memory read/write timing diagram.
Removed TBD for Min value of Clock to FIFO Data Output Propagation Delay (t
Slave FIFO Synchronous Read
Changed
powered applications
Added register GPCR2 in register summary
Added timing for strobing RD#/WR# signals when using PortC strobe feature (Section 10.5)
Removed XTALINSRC register from register summary.
Changed Vcc margins to +10%
Added 56-pin VFBGA Pin Package Diagram
Added 56-pin VFBGA definition in pin listing
Added RDK part number to the Ordering Information table
Figure 1
Figure 5
Figure 36
added parameter V
Figure 14
from a max value of 70 ns to 115 ns
Table 33
to add ECC block and fix errors
for clarity
to include part CY7C68016A-56LFXC in the part listed for battery
to match current spec revision
memory write timing Diagram
IH_X
Description of Change
and V
Table
IL_X
9, Section 5.0
CY7C68013A, CY7C68014A
CY7C68015A, CY7C68016A
Table 33
2
C
as per spec change in 28-00054.
Page 61 of 62
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