LPC2361_62 NXP Semiconductors, LPC2361_62 Datasheet - Page 21

• Manufacturer Part Number: LPC2361_62
• Description: The LPC2361/2362 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with up to 128 kB of embedded high-speed flash memory
• Manufacturer: NXP Semiconductors

NXP Semiconductors
LPC2361_62
Product data sheet
7.12.1 Features
7.13.1 Features
7.11.1 Features
7.12 10-bit ADC
7.13 10-bit DAC
Each CAN controller has a register structure similar to the NXP SJA1000 and the PeliCAN
Library block, but the 8-bit registers of those devices have been combined in 32-bit words
to allow simultaneous access in the ARM environment. The main operational difference is
that the recognition of received Identifiers, known in CAN terminology as Acceptance
Filtering, has been removed from the CAN controllers and centralized in a global
Acceptance Filter.
The LPC2361/2362 contain one ADC. It is a single 10-bit successive approximation ADC
with six channels.
The DAC allows the LPC2361/2362 to generate a variable analog output. The maximum
output value of the DAC is V
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Two CAN controllers and buses.
Data rates to 1 Mbit/s on each bus.
32-bit register and RAM access.
Compatible with CAN specification 2.0B, ISO 11898-1.
Global Acceptance Filter recognizes 11-bit and 29-bit receive identifiers for all CAN
buses.
Acceptance Filter can provide FullCAN-style automatic reception for selected
Standard Identifiers.
FullCAN messages can generate interrupts.
10-bit successive approximation ADC.
Input multiplexing among 6 pins.
Power-down mode.
Measurement range 0 V to V
10-bit conversion time  2.44 s.
Burst conversion mode for single or multiple inputs.
Optional conversion on transition of input pin or Timer Match signal.
Individual result registers for each ADC channel to reduce interrupt overhead.
10-bit DAC
Resistor string architecture
Buffered output
Power-down mode
Selectable output drive
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 25 October 2011
i(VREF)
i(VREF)
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Single-chip 16-bit/32-bit MCU
LPC2361/62
© NXP B.V. 2011. All rights reserved.
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