LPC2361_62 NXP Semiconductors, LPC2361_62 Datasheet - Page 4
LPC2361_62
Manufacturer Part Number
LPC2361_62
Description
The LPC2361/2362 microcontrollers are based on a 16-bit/32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with up to 128 kB of embedded high-speed flash memory
Manufacturer
NXP Semiconductors
Datasheet
1.LPC2361_62.pdf
(64 pages)
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NXP Semiconductors
5. Block diagram
LPC2361_62
Product data sheet
Fig 1.
2 × CAP0/CAP1/
2 × MAT0/MAT1/
EINT3 to EINT0
power domain 2
power domain 2
(1) LPC2362 only.
CAP2/CAP3
2 × PCAP1
P0, P1, P2,
6 × PWM1
4 × MAT2,
6 × AD0
LPC2361/2362 block diagram
RTCX1
RTCX2
RMII(8)
P0, P2
P0, P1
AOUT
P3, P4
MAT3
VBAT
HIGH-SPEED
LPC2361/62
ETHERNET
MAC WITH
OSCILLATOR
70 PINS
DMA
TOTAL
GPI/O
EXTERNAL INTERRUPTS
RTC
CAPTURE/COMPARE
SYSTEM CONTROL
(1)
2 kB BATTERY RAM
WATCHDOG TIMER
A/D CONVERTER
D/A CONVERTER
TIMER0/TIMER1/
TIMER2/TIMER3
LEGACY GPI/O
52 PINS TOTAL
8/32 kB
AHB2
PWM1
SRAM
SRAM
16 kB
CONTROLLERS
SRAM
INTERNAL
CLOCK
REAL-
64/128 kB
TIME
FLASH
All information provided in this document is subject to legal disclaimers.
FLASH
BRIDGE
MASTER
PORT
AHB
TRST
Rev. 5 — 25 October 2011
ARM7TDMI-S
TEST/DEBUG
TMS
INTERFACE
TCK TDO
AHB BRIDGE
APB BRIDGE
AHB TO
TDI
AHB TO
EXTIN0
trace signals
BRIDGE
SLAVE
AHB
PORT
CONTROLLER
system
INTERRUPT
VECTORED
clock
PLL
SPI, SSP0 INTERFACE
UART0, UART2, UART3
RESET
SSP1 INTERFACE
I
SRAM
I
2
2
8 kB
CAN1, CAN2
S INTERFACE
C0, I
XTAL2
CONTROLLER
UART1
INTERNAL RC
OSCILLATOR
FUNCTIONS
2
GP DMA
AHB1
C1, I
XTAL1
SYSTEM
USB WITH
4 kB RAM
AND DMA
2
Single-chip 16-bit/32-bit MCU
V
C2
DDA
002aad964
V
DD(3V3)
LPC2361/62
© NXP B.V. 2011. All rights reserved.
VREF
V
V
V
USB port 1
I2SRX_CLK
I2STX_CLK
I2SRX_WS
I2STX_WS
I2SRX_SDA
I2STX_SDA
SCK, SCK0
MOSI, MOSI0
MISO, MISO0
SSEL, SSEL0
SCK1
MOSI1
MISO1
SSEL1
TXD0, TXD2, TXD3
RXD0, RXD2, RXD3
TXD1
RXD1
DTR1, RTS1
DSR1, CTS1, DCD1,
RI1
RD1, RD2
TD1, TD2
SCL0, SCL1, SCL2
SDA0, SDA1, SDA2
SSA
DD(DCDC)(3V3)
BUS
, V
SS
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