LPC2367FBD100 NXP Semiconductors, LPC2367FBD100 Datasheet - Page 16

• Manufacturer Part Number: LPC2367FBD100
• Description: The LPC2367FBD100 is a ARM7 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 72 MHz
• Manufacturer: NXP Semiconductors

NXP Semiconductors
Table 4.
LPC2364_65_66_67_68
Product data sheet
Symbol
P2[12]/EINT2/
MCIDAT2/
I2STX_WS
P2[13]/EINT3/
MCIDAT3/
I2STX_SDA
P3[0] to P3[31]
P3[25]/MAT0[0]/
PWM1[2]
P3[26]/MAT0[1]/
PWM1[3]
P4[0] to P4[31]
P4[28]/MAT2[0]/
TXD3
P4[29]/MAT2[1]/
RXD3
DBGEN
TDO
TDI
TMS
TRST
TCK
RTCK
Pin description
Pin
51
50
27
26
82
85
-
1
2
3
4
5
100
[1][7]
[1][8]
[1][8]
[1][8]
[1][7]
[6]
[6]
[1]
[1]
[1]
[1]
[1][8]
…continued
Ball
K10
J9
H3
K1
C7
E6
D4
A1
C3
B1
C2
C1
B2
[6]
[1]
[1]
[1][7]
[1][8]
[1][8]
[1]
[1]
[1][8]
[1][8]
[1][8]
[1][7]
[6]
Type
I/O
I
O
I/O
I/O
I
O
I/O
I/O
I/O
O
O
I/O
O
O
I/O
I/O
O
O
I/O
O
I
I
O
I
I
I
I
I/O
All information provided in this document is subject to legal disclaimers.
Description
P2[12] — General purpose digital input/output pin.
EINT2 — External interrupt 2 input.
MCIDAT2 — Data line for SD/MMC interface. (LPC2367/68 only)
I2STX_WS — Transmit Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the I
specification.
P2[13] — General purpose digital input/output pin.
EINT3 — External interrupt 3 input.
MCIDAT3 — Data line for SD/MMC interface. (LPC2367/68 only)
I2STX_SDA — Transmit data. It is driven by the transmitter and read by the
receiver. Corresponds to the signal SD in the I
Port 3: Port 3 is a 32-bit I/O port with individual direction controls for each
bit. The operation of Port 3 pins depends upon the pin function selected via
the pin connect block. Pins 0 through 24, and 27 through 31 of this port are
not available.
P3[25] — General purpose digital input/output pin.
MAT0[0] — Match output for Timer 0, channel 0.
PWM1[2] — Pulse Width Modulator 1, output 2.
P3[26] — General purpose digital input/output pin.
MAT0[1] — Match output for Timer 0, channel 1.
PWM1[3] — Pulse Width Modulator 1, output 3.
Port 4: Port 4 is a 32-bit I/O port with individual direction controls for each
bit. The operation of Port 4 pins depends upon the pin function selected via
the pin connect block. Pins 0 through 27, 30, and 31 of this port are not
available.
P4[28] — General purpose digital input/output pin.
MAT2[0] — Match output for Timer 2, channel 0.
TXD3 — Transmitter output for UART3.
P4[29] — General purpose digital input/output pin.
MAT2[1] — Match output for Timer 2, channel 1.
RXD3 — Receiver input for UART3.
DBGEN — JTAG interface control signal. Also used for boundary scanning.
Note: This pin is available in LPC2364FET100 and LPC2368FET100
devices only (TFBGA package).
TDO — Test Data out for JTAG interface.
TDI — Test Data in for JTAG interface.
TMS — Test Mode Select for JTAG interface.
TRST — Test Reset for JTAG interface.
TCK — Test Clock for JTAG interface. This clock must be slower than
the CPU clock (CCLK) for the JTAG interface to operate
RTCK — JTAG interface control signal.
Note: LOW on this pin while RESET is LOW enables ETM pins (P2[9:0]) to
operate as trace port after reset.
Rev. 7 — 20 October 2011
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
2
S-bus specification.
© NXP B.V. 2011. All rights reserved.
2
S-bus
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