LPC2367FBD100 NXP Semiconductors, LPC2367FBD100 Datasheet - Page 59

The LPC2367FBD100 is a ARM7 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 72 MHz

LPC2367FBD100

Manufacturer Part Number
LPC2367FBD100
Description
The LPC2367FBD100 is a ARM7 microcontroller for embedded applications featuring a high level of integration and low power consumption at frequencies of 72 MHz
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC2364_65_66_67_68
Product data sheet
14.5 Standard I/O pin configuration
Figure 23
The default configuration for standard I/O pins is input with pull-up enabled. The weak
MOS devices provide a drive capability equivalent to pull-up and pull-down resistors.
Fig 23. Standard I/O pin configuration with analog input
as digital output
as analog input
as digital input
pin configured
pin configured
pin configured
Digital output driver
Digital input: Pull-up enabled/disabled
Digital input: Pull-down enabled/disabled
Analog input (for ADC input channels)
driver
shows the possible pin modes for standard I/O pins with analog input function:
All information provided in this document is subject to legal disclaimers.
analog input
Rev. 7 — 20 October 2011
data input
output
output enable
pull-down enable
pull-up enable
select analog input
LPC2364/65/66/67/68
Single-chip 16-bit/32-bit microcontrollers
V
DD
weak
pull-up
weak
pull-down
© NXP B.V. 2011. All rights reserved.
V
ESD
DD
ESD
V
SS
002aaf496
59 of 69
PIN

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