MT29F8G08FACWP Micron Technology, MT29F8G08FACWP Datasheet - Page 18

• Manufacturer Part Number: MT29F8G08FACWP
• Description: NAND Flash Memory
• Manufacturer: Micron Technology

Data Input
READs
Ready/Busy#
Figure 11:
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2_4_8gb_nand_m49a__2.fm - Rev. A 3/06 EN
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Time Constants
Data is written to the data register on the rising edge of WE# when:
• CE#, CLE, and ALE are LOW, and
• the device is not busy.
Data is input on I/O[7:0] for x8 devices, and I/O[15:0] on x16 devices. See Figure 39 on
page 47 for additional data input details.
After a READ command is issued, data is transferred from the memory array to the data
register on the rising edge of WE#. R/B# goes LOW for
transfer is complete. When R/B# goes HIGH, data is available in the data register, and is
clocked out of the part by toggling RE#. See Figure 42 on page 48 for detailed timing
information.
The READ STATUS (70h) command or the R/B# signal can be used to determine when
the device is ready. See the READ STATUS command section on page 28 for details.
The R/B# output provides a hardware method of indicating the completion of PRO-
GRAM, ERASE, and READ operations. The signal requires a pull-up resistor for proper
operation. The signal is typically HIGH, and transitions to LOW after the appropriate
command is written to the device. The signal pin’s open-drain driver enables multiple
R/B# outputs to be OR-tied. The READ STATUS command can be used in place of R/B#.
Typically R/B# is connected to an interrupt pin on the system controller (see Figure 13
on page 19).
On the 8Gb MT29F8G08FAC, R/B# provides a status indication for the 4Gb section
enabled by CE#, and R/B2# does the same for the 4Gb section enabled by CE2#. R/B#
and R/B2# can be tied together, or they can be used separately to provide independent
indications for each 4Gb section.
The combination of Rp and capacitive loading of the R/B# circuit determines the rise
time of the R/B# pin. The actual value used for Rp depends on the system timing
requirements. Large values of Rp cause R/B# to be delayed significantly. At the 10- to
90-percent points on the R/B# waveform, rise time is approximately two time constants
(TC).
The fall time of the R/B# signal is determined mainly by the output impedance of the
R/B# pin and the total load capacitance.
Refer to Figure 14 on page 19, and Figure 15 on page 20, which depict approximate Rp
values using a circuit load of 100pF.
The minimum value for Rp is determined by the output drive capability of the R/B# sig-
nal, the output voltage swing, and V
TC = R × C
Where R = Rp (resistance of pull-up resistor), and C = total capacitive load.
18
2Gb, 4GB, 8Gb: x8, x16 NAND Flash Memory
CC
.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
R and transitions HIGH after the
©2005 Micron Technology, Inc. All rights reserved.
Bus Operation