HD6417615AF60 HITACHI [Hitachi Semiconductor], HD6417615AF60 Datasheet - Page 414

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HD6417615AF60

Manufacturer Part Number
HD6417615AF60
Description
CMOS single-chip microcontroller
Manufacturer
HITACHI [Hitachi Semiconductor]
Datasheet
1. When the transmit enable (TE) bit is set, the transmitter enters the transmit idle state.
2. When a transmit request is issued by the transmit E-DMAC, the EtherC sends the preamble
Note: If full-duplex transfer is selected, which does not require carrier detection, the preamble is
3. The transmitter sends the SFD, data, and CRC sequentially. At the end of transmission, the
Note: If a collision or the carrier-not-detected state occurs during data transmission, these are
398
Notes: 1. Transmission retry processing includes both jam transmission that depends on collision detection and the
after a transmission delay equivalent to the frame interval time.
transmit E-DMAC generates a transmission complete interrupt (TC).
2. Transmission is retried only when data of 512 bits or less (including the preamble and SFD) is transmitted.
sent as soon as a transmit request is issued by the transmit E-DMAC.
reported as interrupt sources.
Transmission
adjustment of transmission intervals based on the back-off algorithm.
When a collision is detected during the transmission of data greater than 512 bits, only jam is transmitted and
transmission based on the back-off algorithm is not retried.
Reset
halted
TE set
TE reset
Figure 9.2 EtherC Transmitter State Transitions
Idle
Error
notification
HDPX
Failure of 15
retransmission
attempts
or
collision after
512-bit time
Normal transmission
Retransmission
processing
detection
detection
detection
FDPX
Carrier
Carrier
Error
*1
Carrier
non-detection
Retrans-
mission
initiation
Error
Carrier
non-detection
Error
Collision
(preamble transmission)
Collision
Collision
Collision
Error
Start of transmission
*2
*2
transmission
transmission
transmission
detection
Carrier
Data
CRC
SFD
HDPX
Carrier
detection
FDPX

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